From: Jiang Liu <jiang.liu@linux.intel.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Bjorn Helgaas <bhelgaas@google.com>,
Randy Dunlap <rdunlap@infradead.org>,
Yinghai Lu <yinghai@kernel.org>, Borislav Petkov <bp@alien8.de>,
Grant Likely <grant.likely@linaro.org>,
Marc Zyngier <marc.zyngier@arm.com>,
Yingjoe Chen <yingjoe.chen@mediatek.com>,
x86@kernel.org, Joerg Roedel <joro@8bytes.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
Andrew Morton <akpm@linux-foundation.org>,
Tony Luck <tony.luck@intel.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
iommu@lists.linux-foundation.org
Subject: [Patch Part2 v5 12/31] x86, dmar: Use new irqdomain interfaces to allocate/free IRQ
Date: Thu, 6 Nov 2014 22:20:25 +0800 [thread overview]
Message-ID: <1415283644-2559-13-git-send-email-jiang.liu@linux.intel.com> (raw)
In-Reply-To: <1415283644-2559-1-git-send-email-jiang.liu@linux.intel.com>
Use new irqdomain interfaces to allocate/free IRQ for DMAR and interrupt
remapping, so we could kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later.
The private definition of irq_alloc_hwirqs()/irq_free_hwirqs() are
temporary solution, it will be removed once we have converted interrupt
remapping driver to use irqdomain framework.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
---
arch/x86/include/asm/irq_remapping.h | 4 ++--
arch/x86/kernel/apic/msi.c | 10 ++++++++++
drivers/iommu/irq_remapping.c | 17 +++++++++++++++--
3 files changed, 27 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index b7747c4c2cf2..230dde9b695e 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -103,7 +103,7 @@ static inline bool setup_remapped_irq(int irq,
}
#endif /* CONFIG_IRQ_REMAP */
-#define dmar_alloc_hwirq() irq_alloc_hwirq(-1)
-#define dmar_free_hwirq irq_free_hwirq
+extern int dmar_alloc_hwirq(void);
+extern void dmar_free_hwirq(int irq);
#endif /* __X86_IRQ_REMAPPING_H */
diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c
index d5def489ca5b..328cf7fbbdc4 100644
--- a/arch/x86/kernel/apic/msi.c
+++ b/arch/x86/kernel/apic/msi.c
@@ -223,6 +223,16 @@ int arch_setup_dmar_msi(unsigned int irq)
"edge");
return 0;
}
+
+int dmar_alloc_hwirq(void)
+{
+ return irq_domain_alloc_irqs(NULL, 1, NUMA_NO_NODE, NULL);
+}
+
+void dmar_free_hwirq(int irq)
+{
+ irq_domain_free_irqs(irq, 1);
+}
#endif
/*
diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
index e9fbd68db96e..63886bafed9f 100644
--- a/drivers/iommu/irq_remapping.c
+++ b/drivers/iommu/irq_remapping.c
@@ -6,6 +6,7 @@
#include <linux/msi.h>
#include <linux/irq.h>
#include <linux/pci.h>
+#include <linux/irqdomain.h>
#include <asm/hw_irq.h>
#include <asm/irq_remapping.h>
@@ -50,6 +51,18 @@ static void irq_remapping_disable_io_apic(void)
disconnect_bsp_APIC(0);
}
+#ifndef CONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
+static unsigned int irq_alloc_hwirqs(int cnt, int node)
+{
+ return irq_domain_alloc_irqs(NULL, -1, cnt, node, NULL);
+}
+
+static void irq_free_hwirqs(unsigned int from, int cnt)
+{
+ irq_domain_free_irqs(from, cnt);
+}
+#endif
+
static int do_setup_msi_irqs(struct pci_dev *dev, int nvec)
{
int ret, sub_handle, nvec_pow2, index = 0;
@@ -113,7 +126,7 @@ static int do_setup_msix_irqs(struct pci_dev *dev, int nvec)
list_for_each_entry(msidesc, &dev->msi_list, list) {
- irq = irq_alloc_hwirq(node);
+ irq = irq_alloc_hwirqs(1, node);
if (irq == 0)
return -1;
@@ -136,7 +149,7 @@ static int do_setup_msix_irqs(struct pci_dev *dev, int nvec)
return 0;
error:
- irq_free_hwirq(irq);
+ irq_free_hwirqs(irq, 1);
return ret;
}
--
1.7.10.4
next prev parent reply other threads:[~2014-11-06 14:20 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-06 14:20 [Patch Part2 v5 00/31] Enable hierarchy irqdomian on x86 platforms Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 01/31] irqdomain: Introduce new interfaces to support hierarchy irqdomains Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 02/31] irqdomain: Do irq_find_mapping and set_type for hierarchy irqdomain in case OF Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 03/31] genirq: Introduce helper functions to support stacked irq_chip Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 04/31] genirq: Introduce irq_chip.irq_compose_msi_msg() to support stacked irqchip Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 05/31] genirq: Add IRQ_SET_MASK_OK_DONE " Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 06/31] x86, irq: Save destination CPU ID in irq_cfg Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 07/31] x86, irq: Use hierarchy irqdomain to manage CPU interrupt vectors Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 08/31] x86, hpet: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 09/31] x86, MSI: " Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 10/31] x86, uv: " Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 11/31] x86, htirq: " Jiang Liu
2014-11-06 14:20 ` Jiang Liu [this message]
2014-11-06 14:20 ` [Patch Part2 v5 17/31] x86, hpet: Enhance HPET IRQ to support hierarchy irqdomain Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 18/31] PCI/MSI: Remove unnecessary braces around single statements Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 20/31] PCI/MSI: Kill redundant call of irq_set_msi_desc() for MSI-X interrupts Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 21/31] PCI/MSI: Enhance core to support hierarchy irqdomain Jiang Liu
2014-11-07 10:40 ` Thomas Gleixner
2014-11-09 4:26 ` Suravee Suthikulpanit
2014-11-09 7:15 ` Jiang Liu
2014-11-10 2:03 ` Suravee Suthikulpanit
2014-11-11 13:02 ` [Patch] " Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 23/31] x86, irq: Directly call native_compose_msi_msg() for DMAR IRQ Jiang Liu
[not found] ` <1415283644-2559-1-git-send-email-jiang.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2014-11-06 14:20 ` [Patch Part2 v5 13/31] x86: irq_remapping: Introduce new interfaces to support hierarchy irqdomain Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 14/31] iommu/vt-d: Change prototypes to prepare for enabling " Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 15/31] iommu/vt-d: Enhance Intel IR driver to suppport " Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 16/31] iommu/amd: Enhance AMD " Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 19/31] PCI/MSI: Simplify PCI MSI code by initializing msi_desc.nvec_used earlier Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 22/31] x86, PCI, MSI: Use hierarchy irqdomain to manage MSI interrupts Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 24/31] iommu/vt-d: Clean up unused MSI related code Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 25/31] iommu/amd: " Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 28/31] iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 26/31] x86: irq_remapping: Clean up unused MSI related code Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 27/31] x86, irq: Clean up unused MSI related code and interfaces Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 29/31] x86, irq: Use hierarchy irqdomain to manage DMAR interrupts Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 30/31] x86, htirq: Use hierarchy irqdomain to manage Hypertransport interrupts Jiang Liu
2014-11-06 14:20 ` [Patch Part2 v5 31/31] x86, uv: Use hierarchy irqdomain to manage UV interrupts Jiang Liu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1415283644-2559-13-git-send-email-jiang.liu@linux.intel.com \
--to=jiang.liu@linux.intel.com \
--cc=akpm@linux-foundation.org \
--cc=benh@kernel.crashing.org \
--cc=bhelgaas@google.com \
--cc=bp@alien8.de \
--cc=grant.likely@linaro.org \
--cc=gregkh@linuxfoundation.org \
--cc=hpa@zytor.com \
--cc=iommu@lists.linux-foundation.org \
--cc=joro@8bytes.org \
--cc=konrad.wilk@oracle.com \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=marc.zyngier@arm.com \
--cc=matthias.bgg@gmail.com \
--cc=mingo@redhat.com \
--cc=rdunlap@infradead.org \
--cc=rjw@rjwysocki.net \
--cc=tglx@linutronix.de \
--cc=tony.luck@intel.com \
--cc=x86@kernel.org \
--cc=yinghai@kernel.org \
--cc=yingjoe.chen@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).