From: fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
To: rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org,
lenb-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
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Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linaro-acpi-cunTk1MwBs8s++Sfvej+rw@public.gmane.org,
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linux-0h96xk9xTtrk1uMJSBkQmQ@public.gmane.org,
linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Fu Wei <fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Subject: [PATCH v9 8/9] clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer
Date: Mon, 25 Jul 2016 23:27:06 +0800 [thread overview]
Message-ID: <1469460427-8643-9-git-send-email-fu.wei@linaro.org> (raw)
In-Reply-To: <1469460427-8643-1-git-send-email-fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
From: Fu Wei <fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
The patch add memory-mapped timer register support by using the information
provided by the new GTDT driver of ACPI.
Signed-off-by: Fu Wei <fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
drivers/clocksource/arm_arch_timer.c | 127 ++++++++++++++++++++++++++++++++++-
1 file changed, 124 insertions(+), 3 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index d285a87..e4909b2 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -840,7 +840,128 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
arch_timer_mem_init);
#ifdef CONFIG_ACPI_GTDT
-/* Initialize per-processor generic timer */
+static struct gt_timer_data __init *arch_timer_mem_get_timer(
+ struct gt_block_data *gt_blocks)
+{
+ struct gt_block_data *gt_block = gt_blocks;
+ struct gt_timer_data *best_frame = NULL;
+ void __iomem *cntctlbase;
+ u32 cnttidr;
+ int i;
+
+ /*
+ * According to ARMv8 Architecture Reference Manual(ARM),
+ * the size of CNTCTLBase frame of memory-mapped timer
+ * is SZ_4K(Offset 0x000 – 0xFFF).
+ */
+ cntctlbase = ioremap(gt_block->cntctlbase_phy, SZ_4K);
+ if (!cntctlbase) {
+ pr_err("Failed to map mem timer control frame base address\n");
+ return NULL;
+ }
+ cnttidr = readl_relaxed(cntctlbase + CNTTIDR);
+
+ /*
+ * Try to find a virtual capable frame. Otherwise fall back to a
+ * physical capable frame.
+ */
+ for (i = 0; i < gt_block->timer_count; i++) {
+ int n;
+ u32 cntacr;
+
+ n = gt_block->timer[i].frame_nr;
+
+ /* Try enabling everything, and see what sticks */
+ cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT |
+ CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT;
+ writel_relaxed(cntacr, cntctlbase + CNTACR(n));
+ cntacr = readl_relaxed(cntctlbase + CNTACR(n));
+
+ if ((cnttidr & CNTTIDR_VIRT(n)) &&
+ !(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) {
+ best_frame = >_block->timer[i];
+ arch_timer_mem_use_virtual = true;
+ break;
+ }
+
+ if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT))
+ continue;
+
+ best_frame = >_block->timer[i];
+ }
+ iounmap(cntctlbase);
+
+ return best_frame;
+}
+
+static int __init arch_timer_mem_acpi_init(size_t timer_count)
+{
+ struct gt_block_data *gt_blocks;
+ struct gt_timer_data *gt_timer;
+ void __iomem *timer_cntbase;
+ int ret = -EINVAL;
+ int timer_irq;
+
+ /*
+ * If we don't have any Platform Timer Structures, just return.
+ */
+ if (!timer_count)
+ return 0;
+
+ /*
+ * before really check all the Platform Timer Structures,
+ * we assume they are GT block, and allocate memory for them.
+ * We will free these memory once we finish the initialization.
+ */
+ gt_blocks = kcalloc(timer_count, sizeof(*gt_blocks), GFP_KERNEL);
+ if (!gt_blocks)
+ return -ENOMEM;
+
+ if (gtdt_arch_timer_mem_init(gt_blocks) > 0) {
+ gt_timer = arch_timer_mem_get_timer(gt_blocks);
+ if (!gt_timer) {
+ pr_err("Failed to get mem timer info.\n");
+ goto error;
+ }
+
+ if (arch_timer_mem_use_virtual)
+ timer_irq = gt_timer->virtual_irq;
+ else
+ timer_irq = gt_timer->irq;
+ if (!timer_irq) {
+ pr_err("Failed to get %s irq for mem timer.",
+ arch_timer_mem_use_virtual ? "virt" : "phys");
+ goto error;
+ }
+
+ /*
+ * According to ARMv8 Architecture Reference Manual(ARM),
+ * the size of CNTBaseN frames of memory-mapped timer
+ * is SZ_4K(Offset 0x000 – 0xFFF).
+ */
+ timer_cntbase = ioremap(gt_timer->cntbase_phy, SZ_4K);
+ if (!timer_cntbase) {
+ pr_err("Failed to map mem timer base address.\n");
+ goto error;
+ }
+
+ ret = arch_timer_mem_register(timer_cntbase, timer_irq);
+ if (ret) {
+ iounmap(timer_cntbase);
+ pr_err("Failed to register mem timer.\n");
+ goto error;
+ }
+
+ arch_counter_base = timer_cntbase;
+ arch_timers_present |= ARCH_MEM_TIMER;
+ }
+
+error:
+ kfree(gt_blocks);
+ return ret;
+}
+
+/* Initialize per-processor generic timer and memory-mapped timer(if present) */
static int __init arch_timer_acpi_init(struct acpi_table_header *table)
{
int timer_count;
@@ -864,8 +985,8 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table)
/* Get the frequency from CNTFRQ */
arch_timer_detect_rate(NULL, NULL);
- if (timer_count < 0)
- pr_err("Failed to get platform timer info, skipping.\n");
+ if (timer_count < 0 || arch_timer_mem_acpi_init((size_t)timer_count))
+ pr_err("Failed to initialize memory-mapped timer, skipping.\n");
arch_timer_init();
--
2.5.5
--
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next prev parent reply other threads:[~2016-07-25 15:27 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-25 15:26 [PATCH v9 0/9] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer fu.wei
[not found] ` <1469460427-8643-1-git-send-email-fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-07-25 15:26 ` [PATCH v9 1/9] clocksource/drivers/arm_arch_timer: Move enums and defines to header file fu.wei-QSEj5FYQhm4dnm+yROfE0A
2016-07-25 15:27 ` [PATCH v9 3/9] clocksource/drivers/arm_arch_timer: Improve printk relevant code fu.wei-QSEj5FYQhm4dnm+yROfE0A
2016-07-25 15:27 ` [PATCH v9 5/9] acpi/arm64: Add GTDT table parse driver fu.wei-QSEj5FYQhm4dnm+yROfE0A
[not found] ` <1469460427-8643-6-git-send-email-fu.wei-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-07-26 11:50 ` Rafael J. Wysocki
[not found] ` <1754781.CC9jSrYt2s-sKB8Sp2ER+y1GS7QM15AGw@public.gmane.org>
2016-07-26 12:40 ` Fu Wei
2016-07-25 15:27 ` [PATCH v9 6/9] clocksource/drivers/arm_arch_timer: Simplify ACPI support code fu.wei-QSEj5FYQhm4dnm+yROfE0A
2016-07-25 15:27 ` [PATCH v9 7/9] acpi/arm64: Add memory-mapped timer support in GTDT driver fu.wei-QSEj5FYQhm4dnm+yROfE0A
2016-07-25 15:27 ` fu.wei-QSEj5FYQhm4dnm+yROfE0A [this message]
2016-07-25 15:27 ` [PATCH v9 9/9] acpi/arm64: Add SBSA Generic Watchdog " fu.wei-QSEj5FYQhm4dnm+yROfE0A
2016-07-25 15:27 ` [PATCH v9 2/9] clocksource/drivers/arm_arch_timer: Add a new enum for spi type fu.wei
2016-07-25 15:27 ` [PATCH v9 4/9] clocksource/drivers/arm_arch_timer: use readq to get 64-bit CNTVCT fu.wei
2016-07-25 15:31 ` Will Deacon
[not found] ` <20160725153118.GD19209-5wv7dgnIgG8@public.gmane.org>
2016-07-25 15:50 ` Timur Tabi
2016-07-25 15:55 ` Fu Wei
[not found] ` <CADyBb7ubKceQiB7+u7sSA=1+9_VMUrGjiabf_FkN2-n4rq7Kgg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-07-25 16:31 ` Will Deacon
[not found] ` <20160725163144.GE19209-5wv7dgnIgG8@public.gmane.org>
2016-07-25 22:49 ` Russell King - ARM Linux
2016-07-26 9:21 ` Fu Wei
2016-07-26 14:11 ` Timur Tabi
2016-07-27 3:33 ` Jisheng Zhang
2016-07-27 4:19 ` Fu Wei
2016-07-28 13:53 ` Will Deacon
2016-08-09 11:03 ` [PATCH v9 0/9] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer Tomasz Nowicki
[not found] ` <7c11cca2-1eaa-a4fb-a44b-cdb36ea99ae9-nYOzD4b6Jr9Wk0Htik3J/w@public.gmane.org>
2016-08-09 18:12 ` Fu Wei
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