Re: ACPI C4 support

Bruno Ducrot
2004-03-01T19:48:25Z

On Mon, Mar 01, 2004 at 07:09:58PM +0100, Stefan Behlert wrote:
> Moin,
>
> On Mar 01, 04 16:28:10 +0100, Bruno Ducrot wrote:
> > On Sat, Feb 28, 2004 at 05:10:11PM +0100, Pavel Machek wrote:
> > > Hi!
> > > Thomas told me:
> > > >what about C4 - Cn states in the kernel implementation?
> > > >A short look into the /proc/acpi/processor/.../power file let me think
> > > >that only C0-C3 is supported by the kernel, even specification talks
> > > >about Cn states?
> > > As a first step, it would be nice if kernel at least used C0..C3 if
> > > the machine supports them... This should do the trick. Does it look
> > > okay?
> >
> > No. pblk_length is 0 or 6. Not 5 nor 7 ;)
>
> Sorry, I don't understand: We've a Laptop with a DSDT with
> Processor (\_PR.CPU0, 0x01, 0x00001010, 0x07)
> in it.
> Comment from the responsible BIOS-team:
> "Our processor block object is 7 bytes in length because we also support
> C4 (P_LVL4) which is at <P_BLK>+6. Therefore, the size/length must be
> reported as 7 and not 6."
>
> Is the '7' the BIOS-developer mentioned the same '7' as mentioned by you?
>

No. Bad documentation. Change documentation. Look at acpi spec at
http://www.acpi.info/

You can define only latencies for C2 and C3 via FADT, so if you allow
C4 via the p_blk, you *don't* have latency for C4. You *must* define C4
in a _CST object in order to get at least the latency, amongst other
informations.

--
Bruno Ducrot

-- Which is worse: ignorance or apathy?
-- Don't know. Don't care.