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* [PATCH 2.6] ia64 support for PCI link devices
@ 2004-04-06  1:45 Chris McDermott
       [not found] ` <20040406014553.GV7695-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
  0 siblings, 1 reply; 2+ messages in thread
From: Chris McDermott @ 2004-04-06  1:45 UTC (permalink / raw)
  To: acpi-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f
  Cc: bjorn.helgaas-VXdhtT5mjnY, davidm-sDzT885Ts8HQT0dZR+AlfA


This patch enables correct enablement of interrupts described by
PCI link device entries in the DSDT.

The current ia64 implementation ignores link entries and therefore
prevents such interrupts from being configured correctly.

Comments?

thanks,
-- 
Chris McDermott


--- orig/arch/ia64/kernel/iosapic.c	2004-03-31 16:19:20.000000000 -0800
+++ new/arch/ia64/kernel/iosapic.c	2004-04-05 10:29:11.668281924 -0700
@@ -688,15 +688,23 @@ iosapic_parse_prt (void)
 	char pci_id[16];
 	struct hw_interrupt_type *irq_type = &irq_type_iosapic_level;
 	irq_desc_t *idesc;
+	int trigger = IOSAPIC_LEVEL;
+	int polarity = IOSAPIC_POL_LOW;
 
 	list_for_each(node, &acpi_prt.entries) {
 		entry = list_entry(node, struct acpi_prt_entry, node);
 
-		/* We're only interested in static (non-link) entries.  */
-		if (entry->link.handle)
-			continue;
+		/* Check for dynamic (PCI link) entry. */
+		if (entry->link.handle) {
+			gsi = acpi_pci_link_get_irq(entry->link.handle, entry->link.index, &trigger, &polarity);
+			if (!gsi)
+				continue;
 
-		gsi = entry->link.index;
+			if (trigger == IOSAPIC_EDGE)
+				irq_type = &irq_type_iosapic_edge;
+		} else {
+			gsi = entry->link.index;
+		}
 
 		vector = gsi_to_vector(gsi);
 		if (vector < 0) {
@@ -710,8 +718,12 @@ iosapic_parse_prt (void)
 				/* new GSI; allocate a vector for it */
 				vector = ia64_alloc_vector();
 
-			register_intr(gsi, vector, IOSAPIC_LOWEST_PRIORITY, IOSAPIC_POL_LOW,
-				      IOSAPIC_LEVEL);
+			if (entry->link.handle)
+				register_intr(gsi, vector, IOSAPIC_LOWEST_PRIORITY, polarity,
+					      trigger);
+			else
+				register_intr(gsi, vector, IOSAPIC_LOWEST_PRIORITY, IOSAPIC_POL_LOW,
+					      IOSAPIC_LEVEL);
 		}
 		entry->irq = vector;
 		snprintf(pci_id, sizeof(pci_id), "%02x:%02x:%02x[%c]",
@@ -723,8 +735,8 @@ iosapic_parse_prt (void)
 		 */
 		idesc = irq_descp(vector);
 		if (idesc->handler != irq_type)
-			register_intr(gsi, vector, IOSAPIC_LOWEST_PRIORITY, IOSAPIC_POL_LOW,
-				      IOSAPIC_LEVEL);
+			register_intr(gsi, vector, IOSAPIC_LOWEST_PRIORITY, polarity,
+				      trigger);
 
 	}
 }


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^ permalink raw reply	[flat|nested] 2+ messages in thread

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2004-04-06  1:45 [PATCH 2.6] ia64 support for PCI link devices Chris McDermott
     [not found] ` <20040406014553.GV7695-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
2004-04-06 16:11   ` Bjorn Helgaas

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