C3 support w/o ARB_DIS (P4-M on i845)

[Karol Kozimor <sziwan-DETuoxkZsSqrDJvtcaxF/A@public.gmane.org>]

Hi,
I've just noticed that FADT shows:
P_LVL2_LAT:       90
P_LVL3_LAT:       300

for my P4-M processor, whereas /proc/acpi/processor/*/power shows:
active state:            C2
default state:           C1
bus master activity:     00000000
states:
    C1:                  promotion[C2] demotion[--] latency[000] usage[00294320]
   *C2:                  promotion[--] demotion[C1] latency[090] usage[02552774]
    C3:                  <not supported>

and /proc/acpi/processor/*/info shows:
processor id:            0
acpi id:                 1
bus mastering control:   no
power management:        yes
throttling control:      yes
performance management:  yes
limit interface:         yes

So, it seems there is some C3 support, but it is not used due to lack of
bus-mastering control (PM2_CNT_BLK is 0). However, the flags section in the
FADT indicates that WBINVD is supported. The comment in processor.c says
the possibility of using C3 in the absence of ARB_DIS must be investigated.
What is the current status? Any obvious caveats for implementation?
Best regards,

-- 
Karol 'sziwan' Kozimor
sziwan-DETuoxkZsSqrDJvtcaxF/A@public.gmane.org


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