From mboxrd@z Thu Jan 1 00:00:00 1970 From: Karol Kozimor Subject: Re: C3 support w/o ARB_DIS (P4-M on i845) Date: Wed, 12 May 2004 21:55:47 +0200 Sender: acpi-devel-admin-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Message-ID: <20040512195546.GA19939@hell.org.pl> References: <20040512102527.GA8050@hell.org.pl> <20040512160353.GA7906@dominikbrodowski.de> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-2 Return-path: Content-Disposition: inline In-Reply-To: <20040512160353.GA7906-X3ehHDuj6sIIGcDfoQAp7BvVK+yQ3ZXh@public.gmane.org> Errors-To: acpi-devel-admin-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , List-Archive: To: Dominik Brodowski Cc: acpi-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: linux-acpi@vger.kernel.org Thus wrote Dominik Brodowski: > Well, there had been some discussion about that approximately two years ago, > maybe it's still in the archives. Major problems, IIRC: > > a) occasional hangs on my system > b) unpredictable time of execution of WBINVD command (results in high latency) > > I had posted some implementation back then, don't know whether it still > works. If you can't find it, contact me again, please. OK, I find the discussion, thanks for pointing that out. that out. Related question: the ICH3-M spec specifies the PM2_CNT address at PMBASE + 0x20, just before the GPE block. This seems consistent with my FADT, which places PMBASE at 0xe400 and GPE0_BLK at 0xe428. Would manual poking at the presumed location of ARB_DIS or FADT override work? Best regards, -- Karol 'sziwan' Kozimor sziwan-DETuoxkZsSqrDJvtcaxF/A@public.gmane.org ------------------------------------------------------- This SF.Net email is sponsored by Sleepycat Software Learn developer strategies Cisco, Motorola, Ericsson & Lucent use to deliver higher performing products faster, at low TCO. http://www.sleepycat.com/telcomwpreg.php?From=osdnemail3