From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mika Westerberg Subject: Re: [PATCH v2 2/3] clk: x86: add support for Lynxpoint LPSS clocks Date: Wed, 23 Jan 2013 19:40:21 +0200 Message-ID: <20130123174021.GK2239@intel.com> References: <1358516761-20981-1-git-send-email-mika.westerberg@linux.intel.com> <1358516761-20981-3-git-send-email-mika.westerberg@linux.intel.com> <20130122184754.24671.16583@quantum> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20130122184754.24671.16583@quantum> Sender: linux-kernel-owner@vger.kernel.org To: Mike Turquette , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" Cc: linux-kernel@vger.kernel.org, x86@kernel.org, Len Brown , "Rafael J. Wysocki" , Arnd Bergmann , Linus Walleij , Mark Brown , Heikki Krogerus , linux-acpi@vger.kernel.org List-Id: linux-acpi@vger.kernel.org On Tue, Jan 22, 2013 at 10:47:54AM -0800, Mike Turquette wrote: > Quoting Mika Westerberg (2013-01-18 05:46:00) > > Intel Lynxpoint Low Power Subsystem hosts peripherals like UART, I2C and > > SPI controllers. For most of these there is a configuration register that > > allows software to enable and disable the functional clock. Disabling the > > clock while the peripheral is not used saves power. > > > > In order to take advantage of this we add a new clock gate of type > > lpss_gate that just re-uses the ordinary clk_gate but in addition is able > > to enumerate the base address register of the device using ACPI. > > > > We then create a clock tree that models the Lynxpoint LPSS clocks using > > these gates and fixed clocks so that we can pass clock rate to the drivers > > as well. > > > > Signed-off-by: Heikki Krogerus > > Signed-off-by: Mika Westerberg > > Reviewed-by: Mark Brown > > Nice to see another architecture using this framework. > > Acked-by: Mike Turquette Thanks! How about x86 maintainers? Do you have any comments on the series?