From: Borislav Petkov <bp@alien8.de>
To: "Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com>
Cc: tony.luck@intel.com, ananth@in.ibm.com,
masbock@linux.vnet.ibm.com, lcm@linux.vnet.ibm.com,
linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org,
ying.huang@intel.com
Subject: Re: [PATCH v2 1/2] mce: acpi/apei: Honour Firmware First for MCA banks listed in APEI HEST CMC
Date: Tue, 25 Jun 2013 19:53:06 +0200 [thread overview]
Message-ID: <20130625175306.GE4855@pd.tnic> (raw)
In-Reply-To: <20130625174536.5226.66421.stgit@localhost.localdomain>
On Tue, Jun 25, 2013 at 11:16:32PM +0530, Naveen N. Rao wrote:
> Tony, Boris,
> Can you please see if the comments in the below patch include the details you
> were expecting?
>
> Thanks,
> Naveen
>
> --
> Add comments to clarify usage of the various bitfields in the MCA subsystem
>
> Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
> ---
> arch/x86/kernel/cpu/mcheck/mce.c | 5 ++++-
> arch/x86/kernel/cpu/mcheck/mce_intel.c | 9 +++++++++
> 2 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
> index 9239504..bf49cdb 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce.c
> @@ -89,7 +89,10 @@ static DECLARE_WAIT_QUEUE_HEAD(mce_chrdev_wait);
> static DEFINE_PER_CPU(struct mce, mces_seen);
> static int cpu_missing;
>
> -/* MCA banks polled by the period polling timer for corrected events */
> +/*
> + * MCA banks polled by the period polling timer for corrected events.
> + * With Intel CMCI, this only has MCA banks which do not support CMCI (if any).
> + */
> DEFINE_PER_CPU(mce_banks_t, mce_poll_banks) = {
> [0 ... BITS_TO_LONGS(MAX_NR_BANKS)-1] = ~0UL
> };
> diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
> index ae1697c..2816f53 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
> @@ -24,6 +24,15 @@
> * Also supports reliable discovery of shared banks.
> */
>
> +/*
> + * Indicates MCA banks controlled by the current cpu for CMCI. Note that this
> + * can change when a cpu is offlined or brought online since some MCA banks
> + * are shared across cpus. When a cpu is offlined, cmci_clear() disables CMCI
> + * on all banks owned by the cpu and clears this bitfield. At this point,
> + * cmci_rediscover() kicks in and a different cpu may end up taking
> + * ownership of some of the shared MCA banks that were previously owned
> + * by the offlined cpu.
> + */
> static DEFINE_PER_CPU(mce_banks_t, mce_banks_owned);
Yep, it looks ok to me.
Acked-by: Borislav Petkov <bp@suse.de>
Thanks.
--
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
--
next prev parent reply other threads:[~2013-06-25 17:53 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-19 17:57 [PATCH v2 1/2] mce: acpi/apei: Honour Firmware First for MCA banks listed in APEI HEST CMC Naveen N. Rao
2013-06-19 17:57 ` [PATCH v2 2/2] mce: acpi/apei: Add a boot option to disable ff mode for corrected errors Naveen N. Rao
2013-06-19 18:04 ` Borislav Petkov
2013-06-19 18:17 ` Naveen N. Rao
2013-06-19 18:19 ` Luck, Tony
2013-06-19 18:36 ` Borislav Petkov
2013-06-19 19:05 ` Luck, Tony
2013-06-19 20:14 ` Borislav Petkov
2013-06-19 20:33 ` Luck, Tony
2013-06-19 21:07 ` Borislav Petkov
2013-06-19 21:28 ` Luck, Tony
2013-06-19 21:41 ` Borislav Petkov
2013-06-19 22:08 ` Luck, Tony
2013-06-20 5:35 ` Borislav Petkov
2013-06-20 21:21 ` Naveen N. Rao
2013-06-20 22:11 ` Luck, Tony
2013-06-21 7:27 ` Borislav Petkov
2013-06-21 16:43 ` Naveen N. Rao
2013-06-28 12:04 ` Naveen N. Rao
2013-06-28 17:31 ` Tony Luck
2013-07-01 15:07 ` Naveen N. Rao
2013-07-01 15:38 ` Borislav Petkov
2013-07-01 15:41 ` Naveen N. Rao
2013-06-20 7:48 ` Borislav Petkov
2013-06-20 19:02 ` Naveen N. Rao
2013-06-20 7:39 ` [PATCH v2 1/2] mce: acpi/apei: Honour Firmware First for MCA banks listed in APEI HEST CMC Borislav Petkov
2013-06-20 19:08 ` Naveen N. Rao
2013-06-20 19:29 ` Borislav Petkov
2013-06-20 20:14 ` Naveen N. Rao
2013-06-20 20:57 ` Borislav Petkov
2013-06-20 21:22 ` Naveen N. Rao
2013-06-21 7:34 ` Borislav Petkov
2013-06-21 7:46 ` Naveen N. Rao
2013-06-21 8:36 ` Borislav Petkov
2013-06-21 9:32 ` Naveen N. Rao
2013-06-21 14:08 ` Borislav Petkov
2013-06-21 16:47 ` Tony Luck
2013-06-21 17:40 ` Borislav Petkov
2013-06-25 17:46 ` Naveen N. Rao
2013-06-25 17:53 ` Borislav Petkov [this message]
2013-06-25 17:55 ` Luck, Tony
2013-06-25 18:28 ` Naveen N. Rao
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130625175306.GE4855@pd.tnic \
--to=bp@alien8.de \
--cc=ananth@in.ibm.com \
--cc=lcm@linux.vnet.ibm.com \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=masbock@linux.vnet.ibm.com \
--cc=naveen.n.rao@linux.vnet.ibm.com \
--cc=tony.luck@intel.com \
--cc=ying.huang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).