From mboxrd@z Thu Jan 1 00:00:00 1970 From: Matthew Garrett Subject: Re: [PATCH v2 0/8] Thunderbolt workarounds Date: Wed, 3 Jul 2013 19:44:34 +0100 Message-ID: <20130703184434.GA29587@srcf.ucam.org> References: <1372860295-8306-1-git-send-email-mika.westerberg@linux.intel.com> <20130703182900.GA29079@srcf.ucam.org> <20130703183311.GA17340@kroah.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20130703183311.GA17340@kroah.com> Sender: linux-pci-owner@vger.kernel.org To: Greg Kroah-Hartman Cc: Mika Westerberg , Bjorn Helgaas , "Rafael J. Wysocki" , Jesse Barnes , Yinghai Lu , john.ronciak@intel.com, miles.j.penner@intel.com, bruce.w.allan@intel.com, Heikki Krogerus , "Kirill A. Shutemov" , linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, x86@kernel.org List-Id: linux-acpi@vger.kernel.org On Wed, Jul 03, 2013 at 11:33:11AM -0700, Greg Kroah-Hartman wrote: > On Wed, Jul 03, 2013 at 07:29:00PM +0100, Matthew Garrett wrote: > > Are there any plans to provide native support for the Thunderbolt > > controller, rather than relying on system management mode? > > For what specific hardware platform? For the ones that this patchset > controls, the OS doesn't have access to the Thunderbolt controller as > far as I can tell, it all happens through the ACPI and PCI hotplug > interface. Given that there exist platforms without the SMM implementation, there's presumably either a controller or chipset register that controls whether SMIs are generated in response to Thunderbolt events. -- Matthew Garrett | mjg59@srcf.ucam.org