Re: [PATCH 3/3] ghes_edac: add platform check to enable ghes_edac

["Luck, Tony" <tony.luck@intel.com>]

On Wed, Jul 19, 2017 at 01:02:45PM -0300, Mauro Carvalho Chehab wrote:
> Tony/Aris,
> 
> I got yesterday an HP ML350 G9, equipped with Sandy Bridge EP CPUs (E5-2640v4).
> I'm running Kernel 4.11 there.
> 
> AFAIKT, Sandy Bridge EP has 4 channels per memory controller, right?
> That would match the number of memory slots on this machine (24 slots).
> 
> Yet, EDAC is only identifying 3 channels per CPU:
> 
>  $  ras-mc-ctl --layout
>        +-----------------------------------------------------------------------+
>        |                mc0                |                mc1                |
>        | channel0  | channel1  | channel2  | channel0  | channel1  | channel2  |
> -------+-----------------------------------------------------------------------+
> slot2: |     0 MB  |     0 MB  |     0 MB  |     0 MB  |     0 MB  |     0 MB  |
> slot1: |     0 MB  |     0 MB  |     0 MB  |     0 MB  |     0 MB  |     0 MB  |
> slot0: |  16384 MB  |     0 MB  |  16384 MB  |  16384 MB  |     0 MB  |  16384 MB  |
> -------+---------------------------------------------------------------------------+
> 
> So, it seems that either the BIOS is hidden the other channel or
> there's something wrong with SandyBridge EP support at sb_edac driver.

Does lspci show all four of these devices?

include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD0    0x3caa  /* 15.2 */
include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD1    0x3cab  /* 15.3 */
include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD2    0x3cac  /* 15.4 */
include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD3    0x3cad  /* 15.5 */

There should be two of each (one on bus 7f, the other on bus ff).

-Tony