From: Greg KH <gregkh@linuxfoundation.org>
To: Jeremy Linton <jeremy.linton@arm.com>
Cc: linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
sudeep.holla@arm.com, hanjun.guo@linaro.org,
lorenzo.pieralisi@arm.com, rjw@rjwysocki.net,
will.deacon@arm.com, catalin.marinas@arm.com,
viresh.kumar@linaro.org, mark.rutland@arm.com,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
jhugo@codeaurora.org, wangxiongfeng2@huawei.com,
Jonathan.Zhang@cavium.com, ahs3@redhat.com,
Jayachandran.Nair@cavium.com, austinwc@codeaurora.org,
lenb@kernel.org, vkilari@codeaurora.org,
morten.rasmussen@arm.com
Subject: Re: [PATCH v6 07/12] drivers: base cacheinfo: Add support for ACPI based firmware tables
Date: Mon, 22 Jan 2018 16:50:22 +0100 [thread overview]
Message-ID: <20180122155022.GA7714@kroah.com> (raw)
In-Reply-To: <20180113005920.28658-8-jeremy.linton@arm.com>
On Fri, Jan 12, 2018 at 06:59:15PM -0600, Jeremy Linton wrote:
> Add a entry to to struct cacheinfo to maintain a reference to the PPTT
> node which can be used to match identical caches across cores. Also
> stub out cache_setup_acpi() so that individual architectures can
> enable ACPI topology parsing.
>
> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
> ---
> drivers/acpi/pptt.c | 1 +
> drivers/base/cacheinfo.c | 20 +++++++++++++-------
> include/linux/cacheinfo.h | 9 +++++++++
> 3 files changed, 23 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c
> index 2c4b3ed862a8..4f5ab19c3a08 100644
> --- a/drivers/acpi/pptt.c
> +++ b/drivers/acpi/pptt.c
> @@ -329,6 +329,7 @@ static void update_cache_properties(struct cacheinfo *this_leaf,
> {
> int valid_flags = 0;
>
> + this_leaf->fw_unique = cpu_node;
> if (found_cache->flags & ACPI_PPTT_SIZE_PROPERTY_VALID) {
> this_leaf->size = found_cache->size;
> valid_flags++;
> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> index 217aa90fb036..ee51e33cc37c 100644
> --- a/drivers/base/cacheinfo.c
> +++ b/drivers/base/cacheinfo.c
> @@ -208,16 +208,16 @@ static int cache_setup_of_node(unsigned int cpu)
>
> if (index != cache_leaves(cpu)) /* not all OF nodes populated */
> return -ENOENT;
> -
> return 0;
> }
> +
Whitespace changes not needed for this patch :(
> #else
> static inline int cache_setup_of_node(unsigned int cpu) { return 0; }
> static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
> struct cacheinfo *sib_leaf)
> {
> /*
> - * For non-DT systems, assume unique level 1 cache, system-wide
> + * For non-DT/ACPI systems, assume unique level 1 caches, system-wide
> * shared caches for all other levels. This will be used only if
> * arch specific code has not populated shared_cpu_map
> */
> @@ -225,6 +225,11 @@ static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
> }
> #endif
>
> +int __weak cache_setup_acpi(unsigned int cpu)
> +{
> + return -ENOTSUPP;
> +}
> +
> static int cache_shared_cpu_map_setup(unsigned int cpu)
> {
> struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
> @@ -235,11 +240,11 @@ static int cache_shared_cpu_map_setup(unsigned int cpu)
> if (this_cpu_ci->cpu_map_populated)
> return 0;
>
> - if (of_have_populated_dt())
> + if (!acpi_disabled)
> + ret = cache_setup_acpi(cpu);
Why does acpi go first? :)
> + else if (of_have_populated_dt())
> ret = cache_setup_of_node(cpu);
> - else if (!acpi_disabled)
> - /* No cache property/hierarchy support yet in ACPI */
> - ret = -ENOTSUPP;
> +
> if (ret)
> return ret;
>
> +int acpi_find_last_cache_level(unsigned int cpu)
> +{
> + /*ACPI kernels should be built with PPTT support*/
Here are some extra ' ' characters, you need them...
thanks,
greg k-h
next prev parent reply other threads:[~2018-01-22 15:50 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-13 0:59 [PATCH v6 00/12] Support PPTT for ARM64 Jeremy Linton
2018-01-13 0:59 ` [PATCH v6 01/12] drivers: base: cacheinfo: move cache_setup_of_node() Jeremy Linton
2018-01-15 12:23 ` Sudeep Holla
2018-01-13 0:59 ` [PATCH v6 02/12] drivers: base: cacheinfo: setup DT cache properties early Jeremy Linton
2018-01-15 12:33 ` Sudeep Holla
2018-01-15 16:07 ` Palmer Dabbelt
2018-01-16 21:26 ` Jeremy Linton
2018-01-17 18:08 ` Sudeep Holla
2018-01-18 17:36 ` Palmer Dabbelt
2018-01-16 21:07 ` Jeremy Linton
2018-01-17 18:20 ` Sudeep Holla
2018-01-17 18:51 ` Jeremy Linton
2018-01-18 10:14 ` Sudeep Holla
2018-01-19 23:27 ` Jeremy Linton
2018-01-13 0:59 ` [PATCH v6 03/12] cacheinfo: rename of_node to fw_unique Jeremy Linton
2018-01-15 12:36 ` Sudeep Holla
2018-01-13 0:59 ` [PATCH v6 04/12] arm64/acpi: Create arch specific cpu to acpi id helper Jeremy Linton
2018-01-15 13:46 ` Sudeep Holla
2018-01-13 0:59 ` [PATCH v6 05/12] ACPI/PPTT: Add Processor Properties Topology Table parsing Jeremy Linton
2018-01-15 14:58 ` Sudeep Holla
2018-01-16 20:55 ` Jeremy Linton
2018-01-17 17:58 ` Sudeep Holla
2018-01-15 15:48 ` Sudeep Holla
2018-01-16 20:22 ` Jeremy Linton
2018-01-17 18:00 ` Sudeep Holla
2018-01-13 0:59 ` [PATCH v6 06/12] ACPI: Enable PPTT support on ARM64 Jeremy Linton
2018-01-15 13:52 ` Sudeep Holla
2018-01-13 0:59 ` [PATCH v6 07/12] drivers: base cacheinfo: Add support for ACPI based firmware tables Jeremy Linton
2018-01-15 15:06 ` Sudeep Holla
2018-01-22 15:50 ` Greg KH [this message]
2018-01-22 21:14 ` Jeremy Linton
2018-01-23 0:11 ` Rafael J. Wysocki
2018-01-13 0:59 ` [PATCH v6 08/12] arm64: " Jeremy Linton
2018-01-15 13:54 ` Sudeep Holla
2018-01-13 0:59 ` [PATCH v6 09/12] ACPI/PPTT: Add topology parsing code Jeremy Linton
2018-01-13 0:59 ` [PATCH v6 10/12] arm64: topology: rename cluster_id Jeremy Linton
2018-01-13 0:59 ` [PATCH v6 11/12] arm64: topology: enable ACPI/PPTT based CPU topology Jeremy Linton
2018-01-25 12:15 ` Xiongfeng Wang
2018-01-25 15:56 ` Jeremy Linton
2018-01-26 4:21 ` Xiongfeng Wang
2018-02-23 11:02 ` Lorenzo Pieralisi
2018-02-24 3:05 ` Xiongfeng Wang
2018-02-25 6:17 ` vkilari
2018-03-01 14:19 ` Morten Rasmussen
2018-02-24 4:37 ` Jeremy Linton
2018-03-01 11:51 ` Morten Rasmussen
2018-01-13 0:59 ` [PATCH v6 12/12] ACPI: Add PPTT to injectable table list Jeremy Linton
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180122155022.GA7714@kroah.com \
--to=gregkh@linuxfoundation.org \
--cc=Jayachandran.Nair@cavium.com \
--cc=Jonathan.Zhang@cavium.com \
--cc=ahs3@redhat.com \
--cc=austinwc@codeaurora.org \
--cc=catalin.marinas@arm.com \
--cc=hanjun.guo@linaro.org \
--cc=jeremy.linton@arm.com \
--cc=jhugo@codeaurora.org \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mark.rutland@arm.com \
--cc=morten.rasmussen@arm.com \
--cc=rjw@rjwysocki.net \
--cc=sudeep.holla@arm.com \
--cc=viresh.kumar@linaro.org \
--cc=vkilari@codeaurora.org \
--cc=wangxiongfeng2@huawei.com \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).