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From: Will Deacon <will.deacon@arm.com>
To: "J. Agustín Vega-Frías" <agustin.vega.frias@gmail.com>
Cc: Agustin Vega-Frias <agustinv@codeaurora.org>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
	Mark Rutland <mark.rutland@arm.com>,
	Jeremy Linton <jeremy.linton@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Phani Pabba <pabba@codeaurora.org>,
	Richard Ruigrok <rruigrok@codeaurora.org>,
	Vijaya Kilari <vkilari@codeaurora.org>,
	Jeff Hugo <jhugo@codeaurora.org>,
	Rahul Ramasubramanian <rahulr@codeaurora.org>
Subject: Re: [RFC V4 0/3] arm_pmu: acpi: variant support and QCOM Falkor extensions
Date: Wed, 25 Jul 2018 16:16:41 +0100	[thread overview]
Message-ID: <20180725151641.GC6866@arm.com> (raw)
In-Reply-To: <CAGbRU0QLSpNEtcryuPPZE98zAo7peEmcDqcQiLi1zO6cfKML2A@mail.gmail.com>

On Sun, Jul 15, 2018 at 03:35:45PM -0500, J. Agustín Vega-Frías wrote:
> On Fri, Jul 13, 2018 at 10:33 AM, Will Deacon <will.deacon@arm.com> wrote:
> > I'm mostly ok with this approach, but I have a concern with the way in which
> > the sysfs interface for carving up the config fields is implemented. If this
> > is intended to be a strict extension to the armv8 pmu architecture, then I
> > don't think you should be overriding the attr_groups entirely. Rather, you
> > should be taking the attr_groups from pmuv3 and then extending them in a way
> > which avoids overlapping field allocations by construction.
> >
> > As it stands, you already have an overlap between the pcc bit and the
> > chained counter bit which Suzuki has implemented and it will be very easy to
> > introduce API breakage if we don't enforce this as part of the design.
> >
> > Will
> 
> FYI, I left Qualcomm on July 6, one of my former colleagues will submit
> new iterations of this series. I will continue to comment on this and future
> patchsets as a courtesy to my former colleagues and the community.
> 
> Thanks for pointing out the sysfs issue. My suggestion on how to address it is:
> 
> 1. Reserve config and config1 for architectural format attributes and
>    config2 for extension format attributes.
> 2. Add a struct attribute ** parameter to the extension init function so
>    extensions can return the new attributes.
> 3. The extension framework code in arm_pmu_acpi.c can then allocate a new
>    attribute array to contain the base and extension attributes and ensure
>    all the new attributes are on config2.
> 
> Though a more elaborate approach can be implemented to find conflicts in
> bit usage within config fields, it would require much more code for a
> relatively simple problem. Thoughts?

As long as you're happy to live inside config2, that sounds sensible to me.

Will

      reply	other threads:[~2018-07-25 15:16 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-05 20:23 [RFC V4 0/3] arm_pmu: acpi: variant support and QCOM Falkor extensions Agustin Vega-Frias
2018-07-05 20:23 ` [RFC V4 1/4] ACPI: add support for sentinel-delimited probe tables Agustin Vega-Frias
2018-07-05 20:23 ` [RFC V4 2/4] arm_pmu: acpi: add support for CPU PMU variant detection Agustin Vega-Frias
2018-07-05 20:23 ` [RFC V4 3/4] perf: qcom: Add PC capture support to CPU PMU Agustin Vega-Frias
2018-07-05 20:23 ` [RFC V4 4/4] perf: qcom: Add Falkor CPU PMU IMPLEMENTATION DEFINED event support Agustin Vega-Frias
2018-07-13 15:33 ` [RFC V4 0/3] arm_pmu: acpi: variant support and QCOM Falkor extensions Will Deacon
2018-07-15 20:35   ` J. Agustín Vega-Frías
2018-07-25 15:16     ` Will Deacon [this message]

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