From: Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
To: will.deacon-5wv7dgnIgG8@public.gmane.org
Cc: zhongmiao-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
okaya-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org,
linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
sudeep.holla-5wv7dgnIgG8@public.gmane.org,
robin.murphy-5wv7dgnIgG8@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
lenb-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Subject: [PATCH v2 1/7] ACPI/IORT: Check ATS capability in root complex nodes
Date: Tue, 9 Apr 2019 17:52:39 +0100 [thread overview]
Message-ID: <20190409165245.26500-2-jean-philippe.brucker@arm.com> (raw)
In-Reply-To: <20190409165245.26500-1-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
Root complex node in IORT has a bit telling whether it supports ATS or
not. Store this bit in the IOMMU fwspec when setting up a device, so it
can be accessed later by an IOMMU driver.
Use the negative version (NO_ATS) at the moment because it's not clear
if/how the bit needs to be integrated in other firmware descriptions. The
SMMU has a feature bit telling if it supports ATS, which might be
sufficient in most systems for deciding whether or not we should enable
the ATS capability in endpoints.
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
---
drivers/acpi/arm64/iort.c | 11 +++++++++++
include/linux/iommu.h | 4 ++++
2 files changed, 15 insertions(+)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index e48894e002ba..7f2c1c9c6b38 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -1028,6 +1028,14 @@ void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size)
dev_dbg(dev, "dma_pfn_offset(%#08llx)\n", offset);
}
+static bool iort_pci_rc_supports_ats(struct acpi_iort_node *node)
+{
+ struct acpi_iort_root_complex *pci_rc;
+
+ pci_rc = (struct acpi_iort_root_complex *)node->node_data;
+ return pci_rc->ats_attribute & ACPI_IORT_ATS_SUPPORTED;
+}
+
/**
* iort_iommu_configure - Set-up IOMMU configuration for a device.
*
@@ -1063,6 +1071,9 @@ const struct iommu_ops *iort_iommu_configure(struct device *dev)
info.node = node;
err = pci_for_each_dma_alias(to_pci_dev(dev),
iort_pci_iommu_init, &info);
+
+ if (!err && !iort_pci_rc_supports_ats(node))
+ dev->iommu_fwspec->flags |= IOMMU_FWSPEC_PCI_NO_ATS;
} else {
int i = 0;
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 3dbeb457fb16..ed6738c358ca 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -509,10 +509,14 @@ struct iommu_fwspec {
const struct iommu_ops *ops;
struct fwnode_handle *iommu_fwnode;
void *iommu_priv;
+ u32 flags;
unsigned int num_ids;
u32 ids[1];
};
+/* Firmware disabled ATS in the root complex */
+#define IOMMU_FWSPEC_PCI_NO_ATS (1 << 0)
+
int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
const struct iommu_ops *ops);
void iommu_fwspec_free(struct device *dev);
--
2.21.0
WARNING: multiple messages have this Message-ID (diff)
From: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
To: will.deacon@arm.com
Cc: iommu@lists.linux-foundation.org,
linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
robin.murphy@arm.com, joro@8bytes.org, hanjun.guo@linaro.org,
lorenzo.pieralisi@arm.com, sudeep.holla@arm.com,
rjw@rjwysocki.net, lenb@kernel.org, okaya@kernel.org,
zhongmiao@hisilicon.com, eric.auger@redhat.com
Subject: [PATCH v2 1/7] ACPI/IORT: Check ATS capability in root complex nodes
Date: Tue, 9 Apr 2019 17:52:39 +0100 [thread overview]
Message-ID: <20190409165245.26500-2-jean-philippe.brucker@arm.com> (raw)
Message-ID: <20190409165239.VBPb7HVq4Ib1Ss8sXzo7iMzqChWSav-BuA0zPx2tlqg@z> (raw)
In-Reply-To: <20190409165245.26500-1-jean-philippe.brucker@arm.com>
Root complex node in IORT has a bit telling whether it supports ATS or
not. Store this bit in the IOMMU fwspec when setting up a device, so it
can be accessed later by an IOMMU driver.
Use the negative version (NO_ATS) at the moment because it's not clear
if/how the bit needs to be integrated in other firmware descriptions. The
SMMU has a feature bit telling if it supports ATS, which might be
sufficient in most systems for deciding whether or not we should enable
the ATS capability in endpoints.
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
---
drivers/acpi/arm64/iort.c | 11 +++++++++++
include/linux/iommu.h | 4 ++++
2 files changed, 15 insertions(+)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index e48894e002ba..7f2c1c9c6b38 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -1028,6 +1028,14 @@ void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size)
dev_dbg(dev, "dma_pfn_offset(%#08llx)\n", offset);
}
+static bool iort_pci_rc_supports_ats(struct acpi_iort_node *node)
+{
+ struct acpi_iort_root_complex *pci_rc;
+
+ pci_rc = (struct acpi_iort_root_complex *)node->node_data;
+ return pci_rc->ats_attribute & ACPI_IORT_ATS_SUPPORTED;
+}
+
/**
* iort_iommu_configure - Set-up IOMMU configuration for a device.
*
@@ -1063,6 +1071,9 @@ const struct iommu_ops *iort_iommu_configure(struct device *dev)
info.node = node;
err = pci_for_each_dma_alias(to_pci_dev(dev),
iort_pci_iommu_init, &info);
+
+ if (!err && !iort_pci_rc_supports_ats(node))
+ dev->iommu_fwspec->flags |= IOMMU_FWSPEC_PCI_NO_ATS;
} else {
int i = 0;
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 3dbeb457fb16..ed6738c358ca 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -509,10 +509,14 @@ struct iommu_fwspec {
const struct iommu_ops *ops;
struct fwnode_handle *iommu_fwnode;
void *iommu_priv;
+ u32 flags;
unsigned int num_ids;
u32 ids[1];
};
+/* Firmware disabled ATS in the root complex */
+#define IOMMU_FWSPEC_PCI_NO_ATS (1 << 0)
+
int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
const struct iommu_ops *ops);
void iommu_fwspec_free(struct device *dev);
--
2.21.0
next prev parent reply other threads:[~2019-04-09 16:52 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-09 16:52 [PATCH v2 0/7] Add PCI ATS support to Arm SMMUv3 Jean-Philippe Brucker
2019-04-09 16:52 ` Jean-Philippe Brucker
[not found] ` <20190409165245.26500-1-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
2019-04-09 16:52 ` Jean-Philippe Brucker [this message]
2019-04-09 16:52 ` [PATCH v2 1/7] ACPI/IORT: Check ATS capability in root complex nodes Jean-Philippe Brucker
[not found] ` <20190409165245.26500-2-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
2019-04-15 13:21 ` Will Deacon
2019-04-15 13:21 ` Will Deacon
[not found] ` <20190415132108.GB15023-UDVVEH7NWB15pKCnmE3YQBJ8xKzm50AiAL8bYrjMMd8@public.gmane.org>
2019-04-15 18:00 ` Jean-Philippe Brucker
2019-04-15 18:00 ` Jean-Philippe Brucker
2019-04-15 18:31 ` Robin Murphy
2019-04-15 18:31 ` Robin Murphy
[not found] ` <c10c7adb-c7f6-f8c6-05cc-f4f143427a2d-5wv7dgnIgG8@public.gmane.org>
2019-04-16 16:27 ` Jean-Philippe Brucker
2019-04-16 16:27 ` Jean-Philippe Brucker
2019-04-09 16:52 ` [PATCH v2 2/7] iommu/arm-smmu-v3: Rename arm_smmu_master_data to arm_smmu_master Jean-Philippe Brucker
2019-04-09 16:52 ` Jean-Philippe Brucker
2019-04-09 16:52 ` [PATCH v2 3/7] iommu/arm-smmu-v3: Store SteamIDs in master Jean-Philippe Brucker
2019-04-09 16:52 ` Jean-Philippe Brucker
2019-04-09 16:52 ` [PATCH v2 4/7] iommu/arm-smmu-v3: Add a master->domain pointer Jean-Philippe Brucker
2019-04-09 16:52 ` Jean-Philippe Brucker
2019-04-09 16:52 ` [PATCH v2 5/7] iommu/arm-smmu-v3: Link domains and devices Jean-Philippe Brucker
2019-04-09 16:52 ` Jean-Philippe Brucker
2019-04-09 16:52 ` [PATCH v2 6/7] iommu/arm-smmu-v3: Add support for PCI ATS Jean-Philippe Brucker
2019-04-09 16:52 ` Jean-Philippe Brucker
[not found] ` <20190409165245.26500-7-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
2019-04-15 13:21 ` Will Deacon
2019-04-15 13:21 ` Will Deacon
[not found] ` <20190415132121.GC15023-UDVVEH7NWB15pKCnmE3YQBJ8xKzm50AiAL8bYrjMMd8@public.gmane.org>
2019-04-15 18:00 ` Jean-Philippe Brucker
2019-04-15 18:00 ` Jean-Philippe Brucker
[not found] ` <0b9b600f-60e0-0740-e1db-6b684bf5a195-5wv7dgnIgG8@public.gmane.org>
2019-04-16 10:00 ` Will Deacon
2019-04-16 10:00 ` Will Deacon
2019-04-09 16:52 ` [PATCH v2 7/7] iommu/arm-smmu-v3: Disable tagged pointers Jean-Philippe Brucker
2019-04-09 16:52 ` Jean-Philippe Brucker
2019-04-15 13:20 ` [PATCH v2 0/7] Add PCI ATS support to Arm SMMUv3 Will Deacon
2019-04-15 13:20 ` Will Deacon
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