From mboxrd@z Thu Jan 1 00:00:00 1970 From: Changbin Du Subject: [PATCH v4 35/63] Documentation: PCI: convert endpoint/pci-test-function.txt to reST Date: Wed, 24 Apr 2019 00:29:04 +0800 Message-ID: <20190423162932.21428-36-changbin.du@gmail.com> References: <20190423162932.21428-1-changbin.du@gmail.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20190423162932.21428-1-changbin.du@gmail.com> Sender: linux-kernel-owner@vger.kernel.org To: Jonathan Corbet Cc: Bjorn Helgaas , rjw@rjwysocki.net, linux-pci@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, mingo@redhat.com, x86@kernel.org, fenghua.yu@intel.com, linuxppc-dev@lists.ozlabs.org, linux-acpi@vger.kernel.org, linux-gpio@vger.kernel.org, mchehab+samsung@kernel.org, Changbin Du List-Id: linux-acpi@vger.kernel.org This converts the plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Changbin Du Acked-by: Bjorn Helgaas --- Documentation/PCI/endpoint/index.rst | 1 + ...est-function.txt => pci-test-function.rst} | 32 +++++++++++-------- 2 files changed, 20 insertions(+), 13 deletions(-) rename Documentation/PCI/endpoint/{pci-test-function.txt => pci-test-function.rst} (84%) diff --git a/Documentation/PCI/endpoint/index.rst b/Documentation/PCI/endpoint/index.rst index 3951de9f923c..b680a3fc4fec 100644 --- a/Documentation/PCI/endpoint/index.rst +++ b/Documentation/PCI/endpoint/index.rst @@ -9,3 +9,4 @@ PCI Endpoint Framework pci-endpoint pci-endpoint-cfs + pci-test-function diff --git a/Documentation/PCI/endpoint/pci-test-function.txt b/Documentation/PCI/endpoint/pci-test-function.rst similarity index 84% rename from Documentation/PCI/endpoint/pci-test-function.txt rename to Documentation/PCI/endpoint/pci-test-function.rst index 5916f1f592bb..ba02cddcec37 100644 --- a/Documentation/PCI/endpoint/pci-test-function.txt +++ b/Documentation/PCI/endpoint/pci-test-function.rst @@ -1,5 +1,10 @@ - PCI TEST - Kishon Vijay Abraham I +.. SPDX-License-Identifier: GPL-2.0 + +================= +PCI Test Function +================= + +:Author: Kishon Vijay Abraham I Traditionally PCI RC has always been validated by using standard PCI cards like ethernet PCI cards or USB PCI cards or SATA PCI cards. @@ -23,30 +28,31 @@ The PCI endpoint test device has the following registers: 8) PCI_ENDPOINT_TEST_IRQ_TYPE 9) PCI_ENDPOINT_TEST_IRQ_NUMBER -*) PCI_ENDPOINT_TEST_MAGIC +* PCI_ENDPOINT_TEST_MAGIC This register will be used to test BAR0. A known pattern will be written and read back from MAGIC register to verify BAR0. -*) PCI_ENDPOINT_TEST_COMMAND: +* PCI_ENDPOINT_TEST_COMMAND: This register will be used by the host driver to indicate the function that the endpoint device must perform. -Bitfield Description: +Bitfield Description:: + Bit 0 : raise legacy IRQ Bit 1 : raise MSI IRQ Bit 2 : raise MSI-X IRQ Bit 3 : read command (read data from RC buffer) Bit 4 : write command (write data to RC buffer) - Bit 5 : copy command (copy data from one RC buffer to another - RC buffer) + Bit 5 : copy command (copy data from one RC buffer to another RC buffer) -*) PCI_ENDPOINT_TEST_STATUS +* PCI_ENDPOINT_TEST_STATUS This register reflects the status of the PCI endpoint device. -Bitfield Description: +Bitfield Description:: + Bit 0 : read success Bit 1 : read fail Bit 2 : write success @@ -57,17 +63,17 @@ Bitfield Description: Bit 7 : source address is invalid Bit 8 : destination address is invalid -*) PCI_ENDPOINT_TEST_SRC_ADDR +* PCI_ENDPOINT_TEST_SRC_ADDR This register contains the source address (RC buffer address) for the COPY/READ command. -*) PCI_ENDPOINT_TEST_DST_ADDR +* PCI_ENDPOINT_TEST_DST_ADDR This register contains the destination address (RC buffer address) for the COPY/WRITE command. -*) PCI_ENDPOINT_TEST_IRQ_TYPE +* PCI_ENDPOINT_TEST_IRQ_TYPE This register contains the interrupt type (Legacy/MSI) triggered for the READ/WRITE/COPY and raise IRQ (Legacy/MSI) commands. @@ -77,7 +83,7 @@ Possible types: - MSI : 1 - MSI-X : 2 -*) PCI_ENDPOINT_TEST_IRQ_NUMBER +* PCI_ENDPOINT_TEST_IRQ_NUMBER This register contains the triggered ID interrupt. -- 2.20.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DEEC8C282DD for ; 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Tue, 23 Apr 2019 09:36:08 -0700 (PDT) Received: from localhost.localdomain ([104.238.181.70]) by smtp.gmail.com with ESMTPSA id v1sm24364801pff.81.2019.04.23.09.35.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 23 Apr 2019 09:36:07 -0700 (PDT) From: Changbin Du To: Jonathan Corbet Cc: Bjorn Helgaas , rjw@rjwysocki.net, linux-pci@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, mingo@redhat.com, x86@kernel.org, fenghua.yu@intel.com, linuxppc-dev@lists.ozlabs.org, linux-acpi@vger.kernel.org, linux-gpio@vger.kernel.org, mchehab+samsung@kernel.org, Changbin Du Subject: [PATCH v4 35/63] Documentation: PCI: convert endpoint/pci-test-function.txt to reST Date: Wed, 24 Apr 2019 00:29:04 +0800 Message-Id: <20190423162932.21428-36-changbin.du@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190423162932.21428-1-changbin.du@gmail.com> References: <20190423162932.21428-1-changbin.du@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Message-ID: <20190423162904.IQgC0dnXW48jfmO96RdPhqm8yW3xls9OdaAbkWWYSEs@z> This converts the plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Changbin Du Acked-by: Bjorn Helgaas --- Documentation/PCI/endpoint/index.rst | 1 + ...est-function.txt => pci-test-function.rst} | 32 +++++++++++-------- 2 files changed, 20 insertions(+), 13 deletions(-) rename Documentation/PCI/endpoint/{pci-test-function.txt => pci-test-function.rst} (84%) diff --git a/Documentation/PCI/endpoint/index.rst b/Documentation/PCI/endpoint/index.rst index 3951de9f923c..b680a3fc4fec 100644 --- a/Documentation/PCI/endpoint/index.rst +++ b/Documentation/PCI/endpoint/index.rst @@ -9,3 +9,4 @@ PCI Endpoint Framework pci-endpoint pci-endpoint-cfs + pci-test-function diff --git a/Documentation/PCI/endpoint/pci-test-function.txt b/Documentation/PCI/endpoint/pci-test-function.rst similarity index 84% rename from Documentation/PCI/endpoint/pci-test-function.txt rename to Documentation/PCI/endpoint/pci-test-function.rst index 5916f1f592bb..ba02cddcec37 100644 --- a/Documentation/PCI/endpoint/pci-test-function.txt +++ b/Documentation/PCI/endpoint/pci-test-function.rst @@ -1,5 +1,10 @@ - PCI TEST - Kishon Vijay Abraham I +.. SPDX-License-Identifier: GPL-2.0 + +================= +PCI Test Function +================= + +:Author: Kishon Vijay Abraham I Traditionally PCI RC has always been validated by using standard PCI cards like ethernet PCI cards or USB PCI cards or SATA PCI cards. @@ -23,30 +28,31 @@ The PCI endpoint test device has the following registers: 8) PCI_ENDPOINT_TEST_IRQ_TYPE 9) PCI_ENDPOINT_TEST_IRQ_NUMBER -*) PCI_ENDPOINT_TEST_MAGIC +* PCI_ENDPOINT_TEST_MAGIC This register will be used to test BAR0. A known pattern will be written and read back from MAGIC register to verify BAR0. -*) PCI_ENDPOINT_TEST_COMMAND: +* PCI_ENDPOINT_TEST_COMMAND: This register will be used by the host driver to indicate the function that the endpoint device must perform. -Bitfield Description: +Bitfield Description:: + Bit 0 : raise legacy IRQ Bit 1 : raise MSI IRQ Bit 2 : raise MSI-X IRQ Bit 3 : read command (read data from RC buffer) Bit 4 : write command (write data to RC buffer) - Bit 5 : copy command (copy data from one RC buffer to another - RC buffer) + Bit 5 : copy command (copy data from one RC buffer to another RC buffer) -*) PCI_ENDPOINT_TEST_STATUS +* PCI_ENDPOINT_TEST_STATUS This register reflects the status of the PCI endpoint device. -Bitfield Description: +Bitfield Description:: + Bit 0 : read success Bit 1 : read fail Bit 2 : write success @@ -57,17 +63,17 @@ Bitfield Description: Bit 7 : source address is invalid Bit 8 : destination address is invalid -*) PCI_ENDPOINT_TEST_SRC_ADDR +* PCI_ENDPOINT_TEST_SRC_ADDR This register contains the source address (RC buffer address) for the COPY/READ command. -*) PCI_ENDPOINT_TEST_DST_ADDR +* PCI_ENDPOINT_TEST_DST_ADDR This register contains the destination address (RC buffer address) for the COPY/WRITE command. -*) PCI_ENDPOINT_TEST_IRQ_TYPE +* PCI_ENDPOINT_TEST_IRQ_TYPE This register contains the interrupt type (Legacy/MSI) triggered for the READ/WRITE/COPY and raise IRQ (Legacy/MSI) commands. @@ -77,7 +83,7 @@ Possible types: - MSI : 1 - MSI-X : 2 -*) PCI_ENDPOINT_TEST_IRQ_NUMBER +* PCI_ENDPOINT_TEST_IRQ_NUMBER This register contains the triggered ID interrupt. -- 2.20.1