From mboxrd@z Thu Jan 1 00:00:00 1970 From: Will Deacon Subject: Re: [PATCH v2 0/5] arm64: SPE ACPI enablement Date: Wed, 1 May 2019 15:15:06 +0100 Message-ID: <20190501141506.GC27353@fuggles.cambridge.arm.com> References: <20190426220309.55654-1-jeremy.linton@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <20190426220309.55654-1-jeremy.linton@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Jeremy Linton Cc: mark.rutland@arm.com, lorenzo.pieralisi@arm.com, catalin.marinas@arm.com, john.garry@huawei.com, rjw@rjwysocki.net, linuxarm@huawei.com, linux-acpi@vger.kernel.org, sudeep.holla@arm.com, linux-arm-kernel@lists.infradead.org, lenb@kernel.org List-Id: linux-acpi@vger.kernel.org Hi Jeremy, On Fri, Apr 26, 2019 at 05:03:04PM -0500, Jeremy Linton wrote: > This patch series enables the Arm Statistical Profiling > Extension (SPE) on ACPI platforms. > > This is possible because ACPI 6.3 uses a previously > reserved field in the MADT to store the SPE interrupt > number, similarly to how the normal PMU is described. > If a consistent valid interrupt exists across all the > cores in the system, a platform device is registered. > That then triggers the SPE module, which runs as normal. > > This version also adds the ability to parse the PPTT for > IDENTICAL cores. We then use this to sanity check the > single SPE device we create. This creates a bit of a > problem with respect to the specification though. The > specification says that its legal for multiple tree's > to exist in the PPTT. We handle this fine, but what > happens in the case of multiple tree's is that the lack > of a common node with IDENTICAL set forces us to assume > that there are multiple non IDENTICAL cores in the > machine. This looks good to me. Please can you respin, addressing Raphael's outstanding concerns on the third patch? Will From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.4 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33697C43219 for ; Wed, 1 May 2019 14:15:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 01DD920866 for ; Wed, 1 May 2019 14:15:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726517AbfEAOPL (ORCPT ); Wed, 1 May 2019 10:15:11 -0400 Received: from foss.arm.com ([217.140.101.70]:59996 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726473AbfEAOPL (ORCPT ); Wed, 1 May 2019 10:15:11 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F273BA78; Wed, 1 May 2019 07:15:10 -0700 (PDT) Received: from fuggles.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id ED2A83F719; Wed, 1 May 2019 07:15:08 -0700 (PDT) Date: Wed, 1 May 2019 15:15:06 +0100 From: Will Deacon To: Jeremy Linton Cc: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, catalin.marinas@arm.com, rjw@rjwysocki.net, lenb@kernel.org, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, sudeep.holla@arm.com, linuxarm@huawei.com, john.garry@huawei.com Subject: Re: [PATCH v2 0/5] arm64: SPE ACPI enablement Message-ID: <20190501141506.GC27353@fuggles.cambridge.arm.com> References: <20190426220309.55654-1-jeremy.linton@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline In-Reply-To: <20190426220309.55654-1-jeremy.linton@arm.com> User-Agent: Mutt/1.11.1+86 (6f28e57d73f2) () Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Message-ID: <20190501141506.7dJAA05kC9upELN-2AJiZlTDZxHtm8qIzngdalnCsTE@z> Hi Jeremy, On Fri, Apr 26, 2019 at 05:03:04PM -0500, Jeremy Linton wrote: > This patch series enables the Arm Statistical Profiling > Extension (SPE) on ACPI platforms. > > This is possible because ACPI 6.3 uses a previously > reserved field in the MADT to store the SPE interrupt > number, similarly to how the normal PMU is described. > If a consistent valid interrupt exists across all the > cores in the system, a platform device is registered. > That then triggers the SPE module, which runs as normal. > > This version also adds the ability to parse the PPTT for > IDENTICAL cores. We then use this to sanity check the > single SPE device we create. This creates a bit of a > problem with respect to the specification though. The > specification says that its legal for multiple tree's > to exist in the PPTT. We handle this fine, but what > happens in the case of multiple tree's is that the lack > of a common node with IDENTICAL set forces us to assume > that there are multiple non IDENTICAL cores in the > machine. This looks good to me. Please can you respin, addressing Raphael's outstanding concerns on the third patch? Will