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From: Thierry Reding <thierry.reding@gmail.com>
To: Hans de Goede <hdegoede@redhat.com>
Cc: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	"Len Brown" <lenb@kernel.org>,
	linux-pwm@vger.kernel.org,
	intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel@lists.freedesktop.org,
	"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
	"Mika Westerberg" <mika.westerberg@linux.intel.com>,
	linux-acpi@vger.kernel.org
Subject: Re: [PATCH v8 04/17] pwm: lpss: Add range limit check for the base_unit register value
Date: Mon, 31 Aug 2020 13:02:07 +0200	[thread overview]
Message-ID: <20200831110207.GB1688464@ulmo> (raw)
In-Reply-To: <20200830125753.230420-5-hdegoede@redhat.com>

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On Sun, Aug 30, 2020 at 02:57:40PM +0200, Hans de Goede wrote:
> When the user requests a high enough period ns value, then the
> calculations in pwm_lpss_prepare() might result in a base_unit value of 0.
> 
> But according to the data-sheet the way the PWM controller works is that
> each input clock-cycle the base_unit gets added to a N bit counter and
> that counter overflowing determines the PWM output frequency. Adding 0
> to the counter is a no-op. The data-sheet even explicitly states that
> writing 0 to the base_unit bits will result in the PWM outputting a
> continuous 0 signal.
> 
> When the user requestes a low enough period ns value, then the
> calculations in pwm_lpss_prepare() might result in a base_unit value
> which is bigger then base_unit_range - 1. Currently the codes for this
> deals with this by applying a mask:
> 
> 	base_unit &= (base_unit_range - 1);
> 
> But this means that we let the value overflow the range, we throw away the
> higher bits and store whatever value is left in the lower bits into the
> register leading to a random output frequency, rather then clamping the
> output frequency to the highest frequency which the hardware can do.
> 
> This commit fixes both issues by clamping the base_unit value to be
> between 1 and (base_unit_range - 1).
> 
> Fixes: 684309e5043e ("pwm: lpss: Avoid potential overflow of base_unit")
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> ---
> Changes in v5:
> - Use clamp_val(... instead of clam_t(unsigned long long, ...
> 
> Changes in v3:
> - Change upper limit of clamp to (base_unit_range - 1)
> - Add Fixes tag
> ---
>  drivers/pwm/pwm-lpss.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Acked-by: Thierry Reding <thierry.reding@gmail.com>

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  reply	other threads:[~2020-08-31 11:27 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-30 12:57 [PATCH v8 00/17] acpi/pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API Hans de Goede
2020-08-30 12:57 ` [PATCH v8 01/17] ACPI / LPSS: Resume Cherry Trail PWM controller in no-irq phase Hans de Goede
2020-08-30 12:57 ` [PATCH v8 02/17] ACPI / LPSS: Save Cherry Trail PWM ctx registers only once (at activation) Hans de Goede
2020-08-30 12:57 ` [PATCH v8 03/17] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare() Hans de Goede
2020-08-31 11:01   ` Thierry Reding
2020-08-30 12:57 ` [PATCH v8 04/17] pwm: lpss: Add range limit check for the base_unit register value Hans de Goede
2020-08-31 11:02   ` Thierry Reding [this message]
2020-08-30 12:57 ` [PATCH v8 05/17] pwm: lpss: Add pwm_lpss_prepare_enable() helper Hans de Goede
2020-08-31 11:03   ` Thierry Reding
2020-08-30 12:57 ` [PATCH v8 06/17] pwm: lpss: Use pwm_lpss_restore() when restoring state on resume Hans de Goede
2020-08-31 11:10   ` Thierry Reding
2020-08-31 11:46     ` Hans de Goede
2020-08-31 13:15       ` Thierry Reding
2020-08-31 17:57         ` Hans de Goede
2020-09-01  8:09           ` Andy Shevchenko
2020-08-30 12:57 ` [PATCH v8 07/17] pwm: lpss: Always update state and set update bit Hans de Goede
2020-08-31  8:56   ` Andy Shevchenko
2020-08-31 11:50     ` Hans de Goede
2020-08-31 11:13   ` Thierry Reding
2020-08-31 11:26     ` Hans de Goede
2020-08-31 13:31       ` Thierry Reding
2020-08-30 12:57 ` [PATCH v8 08/17] pwm: crc: Fix period / duty_cycle times being off by a factor of 256 Hans de Goede
2020-08-31 11:13   ` Thierry Reding
2020-08-31 11:14   ` Thierry Reding
2020-08-30 12:57 ` [PATCH v8 09/17] pwm: crc: Fix off-by-one error in the clock-divider calculations Hans de Goede
2020-08-31 11:15   ` Thierry Reding
2020-08-30 12:57 ` [PATCH v8 10/17] pwm: crc: Fix period changes not having any effect Hans de Goede
2020-08-31 11:15   ` Thierry Reding
2020-08-30 12:57 ` [PATCH v8 11/17] pwm: crc: Enable/disable PWM output on enable/disable Hans de Goede
2020-08-31 11:16   ` Thierry Reding
2020-08-30 12:57 ` [PATCH v8 12/17] pwm: crc: Implement apply() method to support the new atomic PWM API Hans de Goede
2020-08-31 11:17   ` Thierry Reding
2020-08-30 12:57 ` [PATCH v8 13/17] pwm: crc: Implement get_state() method Hans de Goede
2020-08-31 11:18   ` Thierry Reding
2020-08-30 12:57 ` [PATCH v8 14/17] drm/i915: panel: Add get_vbt_pwm_freq() helper Hans de Goede
2020-08-30 12:57 ` [PATCH v8 15/17] drm/i915: panel: Honor the VBT PWM frequency for devs with an external PWM controller Hans de Goede
2020-08-30 12:57 ` [PATCH v8 16/17] drm/i915: panel: Honor the VBT PWM min setting " Hans de Goede
2020-08-30 12:57 ` [PATCH v8 17/17] drm/i915: panel: Use atomic PWM API " Hans de Goede

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