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Date:   Tue, 15 Jun 2021 07:55:24 +0200
From:   Christoph Hellwig <hch@lst.de>
To:     "Limonciello, Mario" <mario.limonciello@amd.com>
Cc:     Keith Busch <kbusch@kernel.org>, Jens Axboe <axboe@fb.com>,
        Christoph Hellwig <hch@lst.de>,
        "open list:NVM EXPRESS DRIVER" <linux-nvme@lists.infradead.org>,
        linux-acpi@vger.kernel.org, rrangel@chromium.org,
        david.e.box@linux.intel.com, Shyam-sundar.S-k@amd.com,
        Nehal-bakulchandra.Shah@amd.com, Alexander.Deucher@amd.com,
        prike.liang@amd.com,
        "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
        Julian Sikorski <belegdol@gmail.com>,
        Sagi Grimberg <sagi@grimberg.me>,
        "Rafael J . Wysocki" <rjw@rjwysocki.net>
Subject: Re: [PATCH v8 2/2] ACPI: Add quirks for AMD Renoir/Lucienne CPUs
 to force the D3 hint
Message-ID: <20210615055524.GA21218@lst.de>
References: <20210609184018.26017-1-mario.limonciello@amd.com> <20210609184018.26017-2-mario.limonciello@amd.com> <831df669-b38e-9f4b-dd67-b613aaab6c28@amd.com>
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On Mon, Jun 14, 2021 at 09:02:36PM -0500, Limonciello, Mario wrote:
> Christoph, Keith ping on this series.  Any other thoughts?
> If it's good can you take this in for nvme-5.14 since Rafael mentioned
> the conflict from the other StorageD3Enable commit in nvme-5.14?

I'll queue it up for nvme-5.14.  I was planning to do a run today.