* [PATCH v2 1/4] acpi: numa: Create enum for memory_target access coordinates indexing
2023-05-19 16:24 [PATCH v2 0/4] acpi: numa: Add target support for generic port to HMAT parsing Dave Jiang
@ 2023-05-19 16:24 ` Dave Jiang
2023-05-19 16:24 ` [PATCH v2 2/4] acpi: numa: Add genport target allocation to the HMAT parsing Dave Jiang
` (2 subsequent siblings)
3 siblings, 0 replies; 8+ messages in thread
From: Dave Jiang @ 2023-05-19 16:24 UTC (permalink / raw)
To: linux-acpi, linux-cxl
Cc: Jonathan Cameron, rafael, lenb, dan.j.williams, ira.weiny,
vishal.l.verma, alison.schofield, lukas, Jonathan.Cameron
Create enums to provide named indexing for the access coordinate array.
This is in preparation for adding generic port support which will add a
third index in the array to keep the generic port attributes separate from
the memory attributes.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
drivers/acpi/numa/hmat.c | 35 ++++++++++++++++++++++++-----------
1 file changed, 24 insertions(+), 11 deletions(-)
diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
index f9ff992038fa..abed728bf09d 100644
--- a/drivers/acpi/numa/hmat.c
+++ b/drivers/acpi/numa/hmat.c
@@ -57,12 +57,18 @@ struct target_cache {
struct node_cache_attrs cache_attrs;
};
+enum {
+ NODE_ACCESS_CLASS_0 = 0,
+ NODE_ACCESS_CLASS_1,
+ NODE_ACCESS_CLASS_MAX,
+};
+
struct memory_target {
struct list_head node;
unsigned int memory_pxm;
unsigned int processor_pxm;
struct resource memregions;
- struct access_coordinate coord[2];
+ struct access_coordinate coord[NODE_ACCESS_CLASS_MAX];
struct list_head caches;
struct node_cache_attrs cache_attrs;
bool registered;
@@ -338,10 +344,12 @@ static __init int hmat_parse_locality(union acpi_subtable_headers *header,
if (mem_hier == ACPI_HMAT_MEMORY) {
target = find_mem_target(targs[targ]);
if (target && target->processor_pxm == inits[init]) {
- hmat_update_target_access(target, type, value, 0);
+ hmat_update_target_access(target, type, value,
+ NODE_ACCESS_CLASS_0);
/* If the node has a CPU, update access 1 */
if (node_state(pxm_to_node(inits[init]), N_CPU))
- hmat_update_target_access(target, type, value, 1);
+ hmat_update_target_access(target, type, value,
+ NODE_ACCESS_CLASS_1);
}
}
}
@@ -600,10 +608,12 @@ static void hmat_register_target_initiators(struct memory_target *target)
*/
if (target->processor_pxm != PXM_INVAL) {
cpu_nid = pxm_to_node(target->processor_pxm);
- register_memory_node_under_compute_node(mem_nid, cpu_nid, 0);
+ register_memory_node_under_compute_node(mem_nid, cpu_nid,
+ NODE_ACCESS_CLASS_0);
access0done = true;
if (node_state(cpu_nid, N_CPU)) {
- register_memory_node_under_compute_node(mem_nid, cpu_nid, 1);
+ register_memory_node_under_compute_node(mem_nid, cpu_nid,
+ NODE_ACCESS_CLASS_1);
return;
}
}
@@ -644,12 +654,13 @@ static void hmat_register_target_initiators(struct memory_target *target)
}
if (best)
hmat_update_target_access(target, loc->hmat_loc->data_type,
- best, 0);
+ best, NODE_ACCESS_CLASS_0);
}
for_each_set_bit(i, p_nodes, MAX_NUMNODES) {
cpu_nid = pxm_to_node(i);
- register_memory_node_under_compute_node(mem_nid, cpu_nid, 0);
+ register_memory_node_under_compute_node(mem_nid, cpu_nid,
+ NODE_ACCESS_CLASS_0);
}
}
@@ -681,11 +692,13 @@ static void hmat_register_target_initiators(struct memory_target *target)
clear_bit(initiator->processor_pxm, p_nodes);
}
if (best)
- hmat_update_target_access(target, loc->hmat_loc->data_type, best, 1);
+ hmat_update_target_access(target, loc->hmat_loc->data_type, best,
+ NODE_ACCESS_CLASS_1);
}
for_each_set_bit(i, p_nodes, MAX_NUMNODES) {
cpu_nid = pxm_to_node(i);
- register_memory_node_under_compute_node(mem_nid, cpu_nid, 1);
+ register_memory_node_under_compute_node(mem_nid, cpu_nid,
+ NODE_ACCESS_CLASS_1);
}
}
@@ -746,8 +759,8 @@ static void hmat_register_target(struct memory_target *target)
if (!target->registered) {
hmat_register_target_initiators(target);
hmat_register_target_cache(target);
- hmat_register_target_perf(target, 0);
- hmat_register_target_perf(target, 1);
+ hmat_register_target_perf(target, NODE_ACCESS_CLASS_0);
+ hmat_register_target_perf(target, NODE_ACCESS_CLASS_1);
target->registered = true;
}
mutex_unlock(&target_lock);
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v2 2/4] acpi: numa: Add genport target allocation to the HMAT parsing
2023-05-19 16:24 [PATCH v2 0/4] acpi: numa: Add target support for generic port to HMAT parsing Dave Jiang
2023-05-19 16:24 ` [PATCH v2 1/4] acpi: numa: Create enum for memory_target access coordinates indexing Dave Jiang
@ 2023-05-19 16:24 ` Dave Jiang
2023-05-19 16:24 ` [PATCH v2 3/4] acpi: numa: Add setting of generic port system locality attributes Dave Jiang
2023-05-19 16:24 ` [PATCH v2 4/4] acpi: numa: Add helper function to retrieve the performance attributes Dave Jiang
3 siblings, 0 replies; 8+ messages in thread
From: Dave Jiang @ 2023-05-19 16:24 UTC (permalink / raw)
To: linux-acpi, linux-cxl
Cc: Jonathan Cameron, rafael, lenb, dan.j.williams, ira.weiny,
vishal.l.verma, alison.schofield, lukas, Jonathan.Cameron
Add SRAT parsing for the HMAT init in order to collect the device handle
from the Generic Port Affinity Structure. The device handle will serve as
the key to search for target data.
Consoliate the common code with alloc_memory_target() in a helper function
alloc_target().
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
drivers/acpi/numa/hmat.c | 53 +++++++++++++++++++++++++++++++++++++++++++---
include/acpi/actbl3.h | 4 +++
2 files changed, 53 insertions(+), 4 deletions(-)
diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
index abed728bf09d..e2ab1cce0add 100644
--- a/drivers/acpi/numa/hmat.c
+++ b/drivers/acpi/numa/hmat.c
@@ -71,6 +71,7 @@ struct memory_target {
struct access_coordinate coord[NODE_ACCESS_CLASS_MAX];
struct list_head caches;
struct node_cache_attrs cache_attrs;
+ u8 device_handle[ACPI_SRAT_DEVICE_HANDLE_SIZE];
bool registered;
};
@@ -125,8 +126,7 @@ static __init void alloc_memory_initiator(unsigned int cpu_pxm)
list_add_tail(&initiator->node, &initiators);
}
-static __init void alloc_memory_target(unsigned int mem_pxm,
- resource_size_t start, resource_size_t len)
+static __init struct memory_target *alloc_target(unsigned int mem_pxm)
{
struct memory_target *target;
@@ -134,7 +134,7 @@ static __init void alloc_memory_target(unsigned int mem_pxm,
if (!target) {
target = kzalloc(sizeof(*target), GFP_KERNEL);
if (!target)
- return;
+ return NULL;
target->memory_pxm = mem_pxm;
target->processor_pxm = PXM_INVAL;
target->memregions = (struct resource) {
@@ -147,6 +147,19 @@ static __init void alloc_memory_target(unsigned int mem_pxm,
INIT_LIST_HEAD(&target->caches);
}
+ return target;
+}
+
+static __init void alloc_memory_target(unsigned int mem_pxm,
+ resource_size_t start,
+ resource_size_t len)
+{
+ struct memory_target *target;
+
+ target = alloc_target(mem_pxm);
+ if (!target)
+ return;
+
/*
* There are potentially multiple ranges per PXM, so record each
* in the per-target memregions resource tree.
@@ -157,6 +170,17 @@ static __init void alloc_memory_target(unsigned int mem_pxm,
start, start + len, mem_pxm);
}
+static __init void alloc_genport_target(unsigned int mem_pxm, u8 *handle)
+{
+ struct memory_target *target;
+
+ target = alloc_target(mem_pxm);
+ if (!target)
+ return;
+
+ memcpy(target->device_handle, handle, ACPI_SRAT_DEVICE_HANDLE_SIZE);
+}
+
static __init const char *hmat_data_type(u8 type)
{
switch (type) {
@@ -498,6 +522,22 @@ static __init int srat_parse_mem_affinity(union acpi_subtable_headers *header,
return 0;
}
+static __init int srat_parse_genport_affinity(union acpi_subtable_headers *header,
+ const unsigned long end)
+{
+ struct acpi_srat_generic_affinity *ga = (void *)header;
+
+ if (!ga)
+ return -EINVAL;
+
+ if (!(ga->flags & ACPI_SRAT_GENERIC_AFFINITY_ENABLED))
+ return 0;
+
+ alloc_genport_target(ga->proximity_domain, (u8 *)ga->device_handle);
+
+ return 0;
+}
+
static u32 hmat_initiator_perf(struct memory_target *target,
struct memory_initiator *initiator,
struct acpi_hmat_locality *hmat_loc)
@@ -848,6 +888,13 @@ static __init int hmat_init(void)
ACPI_SRAT_TYPE_MEMORY_AFFINITY,
srat_parse_mem_affinity, 0) < 0)
goto out_put;
+
+ if (acpi_table_parse_entries(ACPI_SIG_SRAT,
+ sizeof(struct acpi_table_srat),
+ ACPI_SRAT_TYPE_GENERIC_PORT_AFFINITY,
+ srat_parse_genport_affinity, 0) < 0)
+ goto out_put;
+
acpi_put_table(tbl);
status = acpi_get_table(ACPI_SIG_HMAT, 0, &tbl);
diff --git a/include/acpi/actbl3.h b/include/acpi/actbl3.h
index f51c46f4e3e4..5772185a54b2 100644
--- a/include/acpi/actbl3.h
+++ b/include/acpi/actbl3.h
@@ -279,12 +279,14 @@ struct acpi_srat_gic_its_affinity {
* 6: ACPI_SRAT_TYPE_GENERIC_PORT_AFFINITY
*/
+#define ACPI_SRAT_DEVICE_HANDLE_SIZE 16
+
struct acpi_srat_generic_affinity {
struct acpi_subtable_header header;
u8 reserved;
u8 device_handle_type;
u32 proximity_domain;
- u8 device_handle[16];
+ u8 device_handle[ACPI_SRAT_DEVICE_HANDLE_SIZE];
u32 flags;
u32 reserved1;
};
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v2 3/4] acpi: numa: Add setting of generic port system locality attributes
2023-05-19 16:24 [PATCH v2 0/4] acpi: numa: Add target support for generic port to HMAT parsing Dave Jiang
2023-05-19 16:24 ` [PATCH v2 1/4] acpi: numa: Create enum for memory_target access coordinates indexing Dave Jiang
2023-05-19 16:24 ` [PATCH v2 2/4] acpi: numa: Add genport target allocation to the HMAT parsing Dave Jiang
@ 2023-05-19 16:24 ` Dave Jiang
2023-06-01 14:38 ` Jonathan Cameron
2023-05-19 16:24 ` [PATCH v2 4/4] acpi: numa: Add helper function to retrieve the performance attributes Dave Jiang
3 siblings, 1 reply; 8+ messages in thread
From: Dave Jiang @ 2023-05-19 16:24 UTC (permalink / raw)
To: linux-acpi, linux-cxl
Cc: rafael, lenb, dan.j.williams, ira.weiny, vishal.l.verma,
alison.schofield, lukas, Jonathan.Cameron
Add generic port support for the parsing of HMAT system locality sub-table.
The attributes will be added to the third array member of the access
coordinates in order to not mix with the existing memory attributes. It only
provides the system locality attributes from initator to the generic port
targets and is missing the rest of the data to the actual memory device.
The complete attributes will be updated when a memory device is
attached and the system locality information is calculated end to end.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
v2:
- Fix commit log runon sentence. (Jonathan)
- Add a check for memory type for skipping other access levels. (Jonathan)
- NODE_ACCESS_CLASS_GENPORT to NODE_ACCESS_CLASS_GENPORT_SINK. (Jonathan)
---
drivers/acpi/numa/hmat.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
index e2ab1cce0add..82320c92abed 100644
--- a/drivers/acpi/numa/hmat.c
+++ b/drivers/acpi/numa/hmat.c
@@ -60,6 +60,7 @@ struct target_cache {
enum {
NODE_ACCESS_CLASS_0 = 0,
NODE_ACCESS_CLASS_1,
+ NODE_ACCESS_CLASS_GENPORT_SINK,
NODE_ACCESS_CLASS_MAX,
};
@@ -368,6 +369,15 @@ static __init int hmat_parse_locality(union acpi_subtable_headers *header,
if (mem_hier == ACPI_HMAT_MEMORY) {
target = find_mem_target(targs[targ]);
if (target && target->processor_pxm == inits[init]) {
+ if (*target->device_handle) {
+ hmat_update_target_access(target, type, value,
+ NODE_ACCESS_CLASS_GENPORT_SINK);
+ if ((hmat_loc->flags &
+ ACPI_HMAT_MEMORY_HIERARCHY) ==
+ ACPI_HMAT_MEMORY)
+ continue;
+ }
+
hmat_update_target_access(target, type, value,
NODE_ACCESS_CLASS_0);
/* If the node has a CPU, update access 1 */
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v2 3/4] acpi: numa: Add setting of generic port system locality attributes
2023-05-19 16:24 ` [PATCH v2 3/4] acpi: numa: Add setting of generic port system locality attributes Dave Jiang
@ 2023-06-01 14:38 ` Jonathan Cameron
2023-06-01 16:04 ` Dave Jiang
0 siblings, 1 reply; 8+ messages in thread
From: Jonathan Cameron @ 2023-06-01 14:38 UTC (permalink / raw)
To: Dave Jiang
Cc: linux-acpi, linux-cxl, rafael, lenb, dan.j.williams, ira.weiny,
vishal.l.verma, alison.schofield, lukas
On Fri, 19 May 2023 09:24:38 -0700
Dave Jiang <dave.jiang@intel.com> wrote:
> Add generic port support for the parsing of HMAT system locality sub-table.
> The attributes will be added to the third array member of the access
> coordinates in order to not mix with the existing memory attributes. It only
> provides the system locality attributes from initator to the generic port
> targets and is missing the rest of the data to the actual memory device.
>
> The complete attributes will be updated when a memory device is
> attached and the system locality information is calculated end to end.
>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Missing
---
here
As a passing comment, hmat_parse_locality() is awfully deeply nested
- maybe worth looking to see if some of the deeply nested stuff can be
factored out... That would be a new patch however
>
> v2:
> - Fix commit log runon sentence. (Jonathan)
> - Add a check for memory type for skipping other access levels. (Jonathan)
> - NODE_ACCESS_CLASS_GENPORT to NODE_ACCESS_CLASS_GENPORT_SINK. (Jonathan)
> ---
> drivers/acpi/numa/hmat.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
> index e2ab1cce0add..82320c92abed 100644
> --- a/drivers/acpi/numa/hmat.c
> +++ b/drivers/acpi/numa/hmat.c
> @@ -60,6 +60,7 @@ struct target_cache {
> enum {
> NODE_ACCESS_CLASS_0 = 0,
> NODE_ACCESS_CLASS_1,
> + NODE_ACCESS_CLASS_GENPORT_SINK,
> NODE_ACCESS_CLASS_MAX,
> };
>
> @@ -368,6 +369,15 @@ static __init int hmat_parse_locality(union acpi_subtable_headers *header,
> if (mem_hier == ACPI_HMAT_MEMORY) {
> target = find_mem_target(targs[targ]);
> if (target && target->processor_pxm == inits[init]) {
> + if (*target->device_handle) {
> + hmat_update_target_access(target, type, value,
> + NODE_ACCESS_CLASS_GENPORT_SINK);
> + if ((hmat_loc->flags &
> + ACPI_HMAT_MEMORY_HIERARCHY) ==
> + ACPI_HMAT_MEMORY)
> + continue;
I'm confused. Isn't this already what was checked for with
if (mem_heir == ACPI_HMAT_MEMORY)?
> + }
> +
> hmat_update_target_access(target, type, value,
> NODE_ACCESS_CLASS_0);
> /* If the node has a CPU, update access 1 */
>
>
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v2 3/4] acpi: numa: Add setting of generic port system locality attributes
2023-06-01 14:38 ` Jonathan Cameron
@ 2023-06-01 16:04 ` Dave Jiang
2023-06-01 16:48 ` Jonathan Cameron
0 siblings, 1 reply; 8+ messages in thread
From: Dave Jiang @ 2023-06-01 16:04 UTC (permalink / raw)
To: Jonathan Cameron
Cc: linux-acpi, linux-cxl, rafael, lenb, dan.j.williams, ira.weiny,
vishal.l.verma, alison.schofield, lukas
On 6/1/23 07:38, Jonathan Cameron wrote:
> On Fri, 19 May 2023 09:24:38 -0700
> Dave Jiang <dave.jiang@intel.com> wrote:
>
>> Add generic port support for the parsing of HMAT system locality sub-table.
>> The attributes will be added to the third array member of the access
>> coordinates in order to not mix with the existing memory attributes. It only
>> provides the system locality attributes from initator to the generic port
>> targets and is missing the rest of the data to the actual memory device.
>>
>> The complete attributes will be updated when a memory device is
>> attached and the system locality information is calculated end to end.
>>
>> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> Missing
> ---
> here
>
> As a passing comment, hmat_parse_locality() is awfully deeply nested
> - maybe worth looking to see if some of the deeply nested stuff can be
> factored out... That would be a new patch however
I'll take a look
>
>
>> v2:
>> - Fix commit log runon sentence. (Jonathan)
>> - Add a check for memory type for skipping other access levels. (Jonathan)
>> - NODE_ACCESS_CLASS_GENPORT to NODE_ACCESS_CLASS_GENPORT_SINK. (Jonathan)
>> ---
>> drivers/acpi/numa/hmat.c | 10 ++++++++++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
>> index e2ab1cce0add..82320c92abed 100644
>> --- a/drivers/acpi/numa/hmat.c
>> +++ b/drivers/acpi/numa/hmat.c
>> @@ -60,6 +60,7 @@ struct target_cache {
>> enum {
>> NODE_ACCESS_CLASS_0 = 0,
>> NODE_ACCESS_CLASS_1,
>> + NODE_ACCESS_CLASS_GENPORT_SINK,
>> NODE_ACCESS_CLASS_MAX,
>> };
>>
>> @@ -368,6 +369,15 @@ static __init int hmat_parse_locality(union acpi_subtable_headers *header,
>> if (mem_hier == ACPI_HMAT_MEMORY) {
>> target = find_mem_target(targs[targ]);
>> if (target && target->processor_pxm == inits[init]) {
>> + if (*target->device_handle) {
>> + hmat_update_target_access(target, type, value,
>> + NODE_ACCESS_CLASS_GENPORT_SINK);
>> + if ((hmat_loc->flags &
>> + ACPI_HMAT_MEMORY_HIERARCHY) ==
>> + ACPI_HMAT_MEMORY)
>> + continue;
> I'm confused. Isn't this already what was checked for with
> if (mem_heir == ACPI_HMAT_MEMORY)?
Yes. Do gen target show up as not memory? I couldn't tell from the ACPI
spec. I wonder if I need to move the setup outside of the (mem_hier ==
ACPI_HMAT_MEMORY)?
>> + }
>> +
>> hmat_update_target_access(target, type, value,
>> NODE_ACCESS_CLASS_0);
>> /* If the node has a CPU, update access 1 */
>>
>>
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v2 3/4] acpi: numa: Add setting of generic port system locality attributes
2023-06-01 16:04 ` Dave Jiang
@ 2023-06-01 16:48 ` Jonathan Cameron
0 siblings, 0 replies; 8+ messages in thread
From: Jonathan Cameron @ 2023-06-01 16:48 UTC (permalink / raw)
To: Dave Jiang
Cc: linux-acpi, linux-cxl, rafael, lenb, dan.j.williams, ira.weiny,
vishal.l.verma, alison.schofield, lukas
On Thu, 1 Jun 2023 09:04:34 -0700
Dave Jiang <dave.jiang@intel.com> wrote:
> On 6/1/23 07:38, Jonathan Cameron wrote:
> > On Fri, 19 May 2023 09:24:38 -0700
> > Dave Jiang <dave.jiang@intel.com> wrote:
> >
> >> Add generic port support for the parsing of HMAT system locality sub-table.
> >> The attributes will be added to the third array member of the access
> >> coordinates in order to not mix with the existing memory attributes. It only
> >> provides the system locality attributes from initator to the generic port
> >> targets and is missing the rest of the data to the actual memory device.
> >>
> >> The complete attributes will be updated when a memory device is
> >> attached and the system locality information is calculated end to end.
> >>
> >> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> > Missing
> > ---
> > here
> >
> > As a passing comment, hmat_parse_locality() is awfully deeply nested
> > - maybe worth looking to see if some of the deeply nested stuff can be
> > factored out... That would be a new patch however
>
>
> I'll take a look
>
> >
> >
> >> v2:
> >> - Fix commit log runon sentence. (Jonathan)
> >> - Add a check for memory type for skipping other access levels. (Jonathan)
> >> - NODE_ACCESS_CLASS_GENPORT to NODE_ACCESS_CLASS_GENPORT_SINK. (Jonathan)
> >> ---
> >> drivers/acpi/numa/hmat.c | 10 ++++++++++
> >> 1 file changed, 10 insertions(+)
> >>
> >> diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
> >> index e2ab1cce0add..82320c92abed 100644
> >> --- a/drivers/acpi/numa/hmat.c
> >> +++ b/drivers/acpi/numa/hmat.c
> >> @@ -60,6 +60,7 @@ struct target_cache {
> >> enum {
> >> NODE_ACCESS_CLASS_0 = 0,
> >> NODE_ACCESS_CLASS_1,
> >> + NODE_ACCESS_CLASS_GENPORT_SINK,
> >> NODE_ACCESS_CLASS_MAX,
> >> };
> >>
> >> @@ -368,6 +369,15 @@ static __init int hmat_parse_locality(union acpi_subtable_headers *header,
> >> if (mem_hier == ACPI_HMAT_MEMORY) {
> >> target = find_mem_target(targs[targ]);
> >> if (target && target->processor_pxm == inits[init]) {
> >> + if (*target->device_handle) {
> >> + hmat_update_target_access(target, type, value,
> >> + NODE_ACCESS_CLASS_GENPORT_SINK);
> >> + if ((hmat_loc->flags &
> >> + ACPI_HMAT_MEMORY_HIERARCHY) ==
> >> + ACPI_HMAT_MEMORY)
> >> + continue;
> > I'm confused. Isn't this already what was checked for with
> > if (mem_heir == ACPI_HMAT_MEMORY)?
>
> Yes. Do gen target show up as not memory? I couldn't tell from the ACPI
> spec. I wonder if I need to move the setup outside of the (mem_hier ==
> ACPI_HMAT_MEMORY)?
I think it would be almost meaningless to target non memory.
Ultimately I guess someone might do cache stashing or similar
and care about targeting a CPU in a memoryless node? Let's
ignore that however.
>
>
> >> + }
> >> +
> >> hmat_update_target_access(target, type, value,
> >> NODE_ACCESS_CLASS_0);
> >> /* If the node has a CPU, update access 1 */
> >>
> >>
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 4/4] acpi: numa: Add helper function to retrieve the performance attributes
2023-05-19 16:24 [PATCH v2 0/4] acpi: numa: Add target support for generic port to HMAT parsing Dave Jiang
` (2 preceding siblings ...)
2023-05-19 16:24 ` [PATCH v2 3/4] acpi: numa: Add setting of generic port system locality attributes Dave Jiang
@ 2023-05-19 16:24 ` Dave Jiang
3 siblings, 0 replies; 8+ messages in thread
From: Dave Jiang @ 2023-05-19 16:24 UTC (permalink / raw)
To: linux-acpi, linux-cxl
Cc: Jonathan Cameron, rafael, lenb, dan.j.williams, ira.weiny,
vishal.l.verma, alison.schofield, lukas, Jonathan.Cameron
Add helper to retrieve the performance attributes based on the device
handle. The helper function is exported so the CXL driver can use that
to acquire the performance data between the CPU and the CXL host bridge.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
v2:
- Change strncmp to memcmp. (Jonathan)
---
drivers/acpi/numa/hmat.c | 35 +++++++++++++++++++++++++++++++++++
include/linux/acpi.h | 12 ++++++++++++
2 files changed, 47 insertions(+)
diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
index 82320c92abed..940d2a838598 100644
--- a/drivers/acpi/numa/hmat.c
+++ b/drivers/acpi/numa/hmat.c
@@ -107,6 +107,41 @@ static struct memory_target *find_mem_target(unsigned int mem_pxm)
return NULL;
}
+static struct memory_target *acpi_find_genport_target(u8 *device_handle)
+{
+ struct memory_target *target;
+
+ list_for_each_entry(target, &targets, node) {
+ if (!memcmp(target->device_handle, device_handle,
+ ACPI_SRAT_DEVICE_HANDLE_SIZE))
+ return target;
+ }
+
+ return NULL;
+}
+
+/**
+ * acpi_get_genport_coordinates - Retrieve the access coordinates for a generic port
+ * @device_handle: Device handle string (ACPI or PCI) to match up to the gen port
+ * @coord: The access coordinates written back out for the generic port
+ *
+ * Return: 0 on success. Errno on failure.
+ */
+int acpi_get_genport_coordinates(u8 *device_handle,
+ struct access_coordinate *coord)
+{
+ struct memory_target *target;
+
+ target = acpi_find_genport_target(device_handle);
+ if (!target)
+ return -ENOENT;
+
+ *coord = target->coord[NODE_ACCESS_CLASS_GENPORT_SINK];
+
+ return 0;
+}
+EXPORT_SYMBOL_NS_GPL(acpi_get_genport_coordinates, CXL);
+
static __init void alloc_memory_initiator(unsigned int cpu_pxm)
{
struct memory_initiator *initiator;
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index dcaaaffff318..56c30791318f 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -15,6 +15,7 @@
#include <linux/mod_devicetable.h>
#include <linux/property.h>
#include <linux/uuid.h>
+#include <linux/node.h>
struct irq_domain;
struct irq_domain_ops;
@@ -456,6 +457,17 @@ extern int acpi_blacklisted(void);
extern void acpi_osi_setup(char *str);
extern bool acpi_osi_is_win8(void);
+#ifdef CONFIG_ACPI_HMAT
+int acpi_get_genport_coordinates(u8 *device_handle,
+ struct access_coordinate *coord);
+#else
+static inline int acpi_get_genport_coordinates(u8 *device_handle,
+ struct access_coordinate *coord)
+{
+ return -EOPNOTSUPP;
+}
+#endif
+
#ifdef CONFIG_ACPI_NUMA
int acpi_map_pxm_to_node(int pxm);
int acpi_get_node(acpi_handle handle);
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