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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id gz21-20020a170906f2d500b009ae0042e48bsm144903ejb.5.2023.10.17.10.03.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 10:03:54 -0700 (PDT) Date: Tue, 17 Oct 2023 19:03:53 +0200 From: Andrew Jones To: Sunil V L Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Conor Dooley , Anup Patel , Ard Biesheuvel , Atish Kumar Patra Subject: Re: [PATCH v3 -next 2/3] RISC-V: ACPI: RHCT: Add function to get CBO block sizes Message-ID: <20231017-3518118151d433af9905238f@orel> References: <20231016164958.1191529-1-sunilvl@ventanamicro.com> <20231016164958.1191529-3-sunilvl@ventanamicro.com> <20231017-b394a120094eeee31693e9a7@orel> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net On Tue, Oct 17, 2023 at 09:09:23PM +0530, Sunil V L wrote: > On Tue, Oct 17, 2023 at 10:37:41AM +0200, Andrew Jones wrote: > > On Mon, Oct 16, 2023 at 10:19:57PM +0530, Sunil V L wrote: > > > Cache Block Operation (CBO) related block size in ACPI is provided by RHCT. > > > Add support to read the CMO node in RHCT to get this information. > > > > > > Signed-off-by: Sunil V L > > > --- > > > arch/riscv/include/asm/acpi.h | 6 +++ > > > drivers/acpi/riscv/rhct.c | 93 +++++++++++++++++++++++++++++++++++ > > > 2 files changed, 99 insertions(+) > > > > > > diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h > > > index d5604d2073bc..7dad0cf9d701 100644 > > > --- a/arch/riscv/include/asm/acpi.h > > > +++ b/arch/riscv/include/asm/acpi.h > > > @@ -66,6 +66,8 @@ int acpi_get_riscv_isa(struct acpi_table_header *table, > > > unsigned int cpu, const char **isa); > > > > > > static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; } > > > +void acpi_get_cbo_block_size(struct acpi_table_header *table, u32 *cbom_size, > > > + u32 *cboz_size, u32 *cbop_size); > > > #else > > > static inline void acpi_init_rintc_map(void) { } > > > static inline struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu) > > > @@ -79,6 +81,10 @@ static inline int acpi_get_riscv_isa(struct acpi_table_header *table, > > > return -EINVAL; > > > } > > > > > > +static inline void acpi_get_cbo_block_size(struct acpi_table_header *table, > > > + u32 *cbom_size, u32 *cboz_size, > > > + u32 *cbop_size) { } > > > + > > > #endif /* CONFIG_ACPI */ > > > > > > #endif /*_ASM_ACPI_H*/ > > > diff --git a/drivers/acpi/riscv/rhct.c b/drivers/acpi/riscv/rhct.c > > > index b280b3e9c7d9..105f1aaa3fac 100644 > > > --- a/drivers/acpi/riscv/rhct.c > > > +++ b/drivers/acpi/riscv/rhct.c > > > @@ -8,6 +8,7 @@ > > > #define pr_fmt(fmt) "ACPI: RHCT: " fmt > > > > > > #include > > > +#include > > > > > > static struct acpi_table_header *acpi_get_rhct(void) > > > { > > > @@ -81,3 +82,95 @@ int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const > > > > > > return -1; > > > } > > > + > > > +static void acpi_parse_hart_info_cmo_node(struct acpi_table_rhct *rhct, > > > + struct acpi_rhct_hart_info *hart_info, > > > + u32 *cbom_size, u32 *cboz_size, u32 *cbop_size) > > > +{ > > > + u32 size_hartinfo = sizeof(struct acpi_rhct_hart_info); > > > + u32 size_hdr = sizeof(struct acpi_rhct_node_header); > > > + struct acpi_rhct_node_header *ref_node; > > > + struct acpi_rhct_cmo_node *cmo_node; > > > + u32 *hart_info_node_offset; > > > + > > > + hart_info_node_offset = ACPI_ADD_PTR(u32, hart_info, size_hartinfo); > > > + for (int i = 0; i < hart_info->num_offsets; i++) { > > > + ref_node = ACPI_ADD_PTR(struct acpi_rhct_node_header, > > > + rhct, hart_info_node_offset[i]); > > > + if (ref_node->type == ACPI_RHCT_NODE_TYPE_CMO) { > > > + cmo_node = ACPI_ADD_PTR(struct acpi_rhct_cmo_node, > > > + ref_node, size_hdr); > > > + if (cbom_size && cmo_node->cbom_size <= 30) { > > > + if (!*cbom_size) { > > > + *cbom_size = BIT(cmo_node->cbom_size); > > > + } else if (*cbom_size != > > > + BIT(cmo_node->cbom_size)) { > > > > No need to break the if line, we can go to 100 chars. And then, since both > > the if and else if arms only have single statements, all the {} can be > > dropped too. Same comment for cboz and cbop. > > > Yeah, it is a side effect of working on repos with different coding > standards. It is interesting that checkpatch didn't recommend to remove > the braces. Let me fix it in next revision. Thanks!. I think checkpatch is OK with single lines that get broken into multiple lines having braces around them. In fact, it may even be preferred. My suggestion is to not break the line though, so checkpatch would likely complain after turning these lines into true single lines. Thanks, drew