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From: Ben Cheatham <Benjamin.Cheatham@amd.com>
To: <dan.j.williams@intel.com>, <dave@stogolabs.net>,
	<jonathan.cameron@huawei.com>, <dave.jiang@intel.com>,
	<alison.schofield@intel.com>, <vishal.l.verma@intel.com>,
	<ira.weiny@intel.com>, <rafael@kernel.org>
Cc: <linux-cxl@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
	<benjamin.cheatham@amd.com>
Subject: [PATCH v11 4/4] EINJ, Documentation: Update EINJ kernel doc
Date: Thu, 8 Feb 2024 14:00:42 -0600	[thread overview]
Message-ID: <20240208200042.432958-5-Benjamin.Cheatham@amd.com> (raw)
In-Reply-To: <20240208200042.432958-1-Benjamin.Cheatham@amd.com>

Update EINJ kernel document to include how to inject CXL protocol error
types, build the kernel to include CXL error types, and give an example
injection.

Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Ben Cheatham <Benjamin.Cheatham@amd.com>
---
 .../firmware-guide/acpi/apei/einj.rst         | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/Documentation/firmware-guide/acpi/apei/einj.rst b/Documentation/firmware-guide/acpi/apei/einj.rst
index d6b61d22f525..f179adf7b61c 100644
--- a/Documentation/firmware-guide/acpi/apei/einj.rst
+++ b/Documentation/firmware-guide/acpi/apei/einj.rst
@@ -181,6 +181,25 @@ You should see something like this in dmesg::
   [22715.834759] EDAC sbridge MC3: PROCESSOR 0:306e7 TIME 1422553404 SOCKET 0 APIC 0
   [22716.616173] EDAC MC3: 1 CE memory read error on CPU_SrcID#0_Channel#0_DIMM#0 (channel:0 slot:0 page:0x12345 offset:0x0 grain:32 syndrome:0x0 -  area:DRAM err_code:0001:0090 socket:0 channel_mask:1 rank:0)
 
+CXL error types are supported from ACPI 6.5 onwards. These error types
+are not available in the legacy interface at /sys/kernel/debug/apei/einj,
+and are instead at /sys/kernel/debug/cxl/. There is a file under debug/cxl
+called "einj_type" that is analogous to available_error_type under debug/cxl.
+There is also a "einj_inject" file in each $dport_dev directory under debug/cxl
+that will inject a given error into the dport represented by $dport_dev.
+For example, to inject a CXL.mem protocol correctable error into
+$dport_dev=pci0000:0c::
+
+    # cd /sys/kernel/debug/cxl/
+    # cat einj_type                 # See which error can be injected
+	0x00008000  CXL.mem Protocol Correctable
+	0x00010000  CXL.mem Protocol Uncorrectable non-fatal
+	0x00020000  CXL.mem Protocol Uncorrectable fatal
+    # cd 0000:e0:01.1               # Navigate to dport to inject into
+    # echo 0x8000 > einj_inject     # Inject error
+
+To use CXL error types, ``CONFIG_CXL_EINJ`` will need to be enabled.
+
 Special notes for injection into SGX enclaves:
 
 There may be a separate BIOS setup option to enable SGX injection.
-- 
2.34.1


  parent reply	other threads:[~2024-02-08 20:01 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-08 20:00 [PATCH v11 0/4] CXL, ACPI, APEI, EINJ: Update EINJ for CXL error types Ben Cheatham
2024-02-08 20:00 ` [PATCH v11 1/4] cxl, ACPI, APEI, EINJ: Add CXL_EINJ Kconfig option Ben Cheatham
2024-02-14 14:05   ` Jonathan Cameron
2024-02-14 14:34     ` Ben Cheatham
2024-02-08 20:00 ` [PATCH v11 2/4] EINJ: Migrate to a platform driver Ben Cheatham
2024-02-14 14:37   ` Jonathan Cameron
2024-02-08 20:00 ` [PATCH v11 3/4] cxl/core, EINJ: Add EINJ CXL debugfs files and EINJ helper functions Ben Cheatham
2024-02-09 21:30   ` Ben Cheatham
2024-02-10  0:02     ` Dan Williams
2024-02-10  6:31       ` Dan Williams
2024-02-12 14:12         ` Ben Cheatham
2024-02-13 17:29           ` Ben Cheatham
2024-02-13 18:08             ` Dan Williams
2024-02-14 15:27   ` Jonathan Cameron
2024-02-14 16:41     ` Ben Cheatham
2024-02-14 17:46       ` Jonathan Cameron
2024-02-14 17:54         ` Ben Cheatham
2024-02-08 20:00 ` Ben Cheatham [this message]
2024-02-14 15:29   ` [PATCH v11 4/4] EINJ, Documentation: Update EINJ kernel doc Jonathan Cameron
2024-02-11  1:15 ` [PATCH v11 0/4] CXL, ACPI, APEI, EINJ: Update EINJ for CXL error types Dan Williams
2024-02-12 14:13   ` Ben Cheatham

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