From: Dave Jiang <dave.jiang@intel.com>
To: linux-cxl@vger.kernel.org, linux-acpi@vger.kernel.org
Cc: dan.j.williams@intel.com, ira.weiny@intel.com,
vishal.l.verma@intel.com, alison.schofield@intel.com,
Jonathan.Cameron@huawei.com, dave@stgolabs.net,
rafael@kernel.org, gregkh@linuxfoundation.org
Subject: [PATCH v6 03/12] ACPI: HMAT: Introduce 2 levels of generic port access class
Date: Tue, 20 Feb 2024 16:12:32 -0700 [thread overview]
Message-ID: <20240220231402.3156281-4-dave.jiang@intel.com> (raw)
In-Reply-To: <20240220231402.3156281-1-dave.jiang@intel.com>
In order to compute access0 and access1 classes for CXL memory, 2 levels
of generic port information must be stored. Access0 will indicate the
generic port access coordinates to the closest initiator and access1
will indicate the generic port access coordinates to the cloest CPU.
Cc: Rafael J. Wysocki <rafael@kernel.org>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
v6:
- Remove check for genport when setting p_nodes in
hmat_update_target_attrs(). (Jonathan)
- Fix access compare logic (kernel test bot)
---
drivers/acpi/numa/hmat.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
index e0144cfbf1f3..a1257888a6df 100644
--- a/drivers/acpi/numa/hmat.c
+++ b/drivers/acpi/numa/hmat.c
@@ -59,7 +59,8 @@ struct target_cache {
};
enum {
- NODE_ACCESS_CLASS_GENPORT_SINK = ACCESS_COORDINATE_MAX,
+ NODE_ACCESS_CLASS_GENPORT_SINK_LOCAL = ACCESS_COORDINATE_MAX,
+ NODE_ACCESS_CLASS_GENPORT_SINK_CPU,
NODE_ACCESS_CLASS_MAX,
};
@@ -141,7 +142,7 @@ int acpi_get_genport_coordinates(u32 uid,
if (!target)
return -ENOENT;
- *coord = target->coord[NODE_ACCESS_CLASS_GENPORT_SINK];
+ *coord = target->coord[NODE_ACCESS_CLASS_GENPORT_SINK_LOCAL];
return 0;
}
@@ -695,7 +696,8 @@ static void hmat_update_target_attrs(struct memory_target *target,
int i;
/* Don't update for generic port if there's no device handle */
- if (access == NODE_ACCESS_CLASS_GENPORT_SINK &&
+ if ((access == NODE_ACCESS_CLASS_GENPORT_SINK_LOCAL ||
+ access == NODE_ACCESS_CLASS_GENPORT_SINK_CPU) &&
!(*(u16 *)target->gen_port_device_handle))
return;
@@ -736,7 +738,8 @@ static void hmat_update_target_attrs(struct memory_target *target,
list_for_each_entry(initiator, &initiators, node) {
u32 value;
- if (access == ACCESS_COORDINATE_CPU &&
+ if ((access == ACCESS_COORDINATE_CPU ||
+ access == NODE_ACCESS_CLASS_GENPORT_SINK_CPU) &&
!initiator->has_cpu) {
clear_bit(initiator->processor_pxm, p_nodes);
continue;
@@ -775,7 +778,9 @@ static void hmat_update_generic_target(struct memory_target *target)
static DECLARE_BITMAP(p_nodes, MAX_NUMNODES);
hmat_update_target_attrs(target, p_nodes,
- NODE_ACCESS_CLASS_GENPORT_SINK);
+ NODE_ACCESS_CLASS_GENPORT_SINK_LOCAL);
+ hmat_update_target_attrs(target, p_nodes,
+ NODE_ACCESS_CLASS_GENPORT_SINK_CPU);
}
static void hmat_register_target_initiators(struct memory_target *target)
--
2.43.0
next prev parent reply other threads:[~2024-02-20 23:14 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-20 23:12 [PATCH v6 0/12] cxl: Add support to report region access coordinates to numa nodes Dave Jiang
2024-02-20 23:12 ` [PATCH v6 01/12] ACPI: HMAT: Remove register of memory node for generic target Dave Jiang
2024-02-20 23:12 ` [PATCH v6 02/12] base/node / ACPI: Enumerate node access class for 'struct access_coordinate' Dave Jiang
2024-03-07 21:02 ` Greg KH
2024-02-20 23:12 ` Dave Jiang [this message]
2024-02-27 17:23 ` [PATCH v6 03/12] ACPI: HMAT: Introduce 2 levels of generic port access class Jonathan Cameron
2024-02-20 23:12 ` [PATCH v6 04/12] ACPI: HMAT / cxl: Add retrieval of generic port coordinates for both access classes Dave Jiang
2024-02-20 23:12 ` [PATCH v6 05/12] cxl: Split out combine_coordinates() for common shared usage Dave Jiang
2024-02-27 17:25 ` Jonathan Cameron
2024-02-20 23:12 ` [PATCH v6 06/12] cxl: Split out host bridge access coordinates Dave Jiang
2024-02-20 23:12 ` [PATCH v6 07/12] cxl: Move QoS class to be calculated from the nearest CPU Dave Jiang
2024-02-20 23:12 ` [PATCH v6 08/12] cxl: Set cxlmd->endpoint before adding port device Dave Jiang
2024-02-20 23:12 ` [PATCH v6 09/12] cxl/region: Calculate performance data for a region Dave Jiang
2024-02-20 23:12 ` [PATCH v6 10/12] cxl/region: Add sysfs attribute for locality attributes of CXL regions Dave Jiang
2024-03-06 14:48 ` Jonathan Cameron
2024-02-20 23:12 ` [PATCH v6 11/12] cxl/region: Add memory hotplug notifier for cxl region Dave Jiang
2024-03-06 14:53 ` Jonathan Cameron
2024-03-07 23:51 ` Dave Jiang
2024-03-08 0:01 ` Dan Williams
2024-02-20 23:12 ` [PATCH v6 12/12] cxl/region: Deal with numa nodes not enumarated by SRAT Dave Jiang
2024-03-06 14:55 ` [PATCH v6 0/12] cxl: Add support to report region access coordinates to numa nodes Jonathan Cameron
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