From: Dave Jiang <dave.jiang@intel.com>
To: linux-cxl@vger.kernel.org, linux-acpi@vger.kernel.org
Cc: dan.j.williams@intel.com, ira.weiny@intel.com,
vishal.l.verma@intel.com, alison.schofield@intel.com,
Jonathan.Cameron@huawei.com, dave@stgolabs.net,
rafael@kernel.org, gregkh@linuxfoundation.org,
Jonathan Cameron <jonathan.cameron@huawei.com>
Subject: [PATCH v7 07/12] cxl: Move QoS class to be calculated from the nearest CPU
Date: Fri, 8 Mar 2024 14:59:26 -0700 [thread overview]
Message-ID: <20240308220055.2172956-8-dave.jiang@intel.com> (raw)
In-Reply-To: <20240308220055.2172956-1-dave.jiang@intel.com>
Retrieve the qos_class (QTG ID) using the access coordinates from the
nearest CPU rather than the nearst initiator that may not be a CPU.
This may be the more appropriate number that applications care about.
For most cases, access0 and access1 have the same values.
Link: https://lore.kernel.org/linux-cxl/20240112113023.00006c50@Huawei.com/
Suggested-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
drivers/cxl/core/cdat.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/cxl/core/cdat.c b/drivers/cxl/core/cdat.c
index 04dfda9d1f1b..02e97a90a43c 100644
--- a/drivers/cxl/core/cdat.c
+++ b/drivers/cxl/core/cdat.c
@@ -198,12 +198,12 @@ static int cxl_port_perf_data_calculate(struct cxl_port *port,
* coordinates in order to allow calculation of access class
* 0 and 1 for region later.
*/
- cxl_coordinates_combine(&coord[ACCESS_COORDINATE_LOCAL],
- &coord[ACCESS_COORDINATE_LOCAL],
+ cxl_coordinates_combine(&coord[ACCESS_COORDINATE_CPU],
+ &coord[ACCESS_COORDINATE_CPU],
&dent->coord);
dent->entries = 1;
rc = cxl_root->ops->qos_class(cxl_root,
- &coord[ACCESS_COORDINATE_LOCAL],
+ &coord[ACCESS_COORDINATE_CPU],
1, &qos_class);
if (rc != 1)
continue;
--
2.44.0
next prev parent reply other threads:[~2024-03-08 22:01 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-08 21:59 [PATCH v7 0/12] cxl: Add support to report region access coordinates to numa nodes Dave Jiang
2024-03-08 21:59 ` [PATCH v7 01/12] ACPI: HMAT: Remove register of memory node for generic target Dave Jiang
2024-03-08 21:59 ` [PATCH v7 02/12] base/node / ACPI: Enumerate node access class for 'struct access_coordinate' Dave Jiang
2024-03-08 21:59 ` [PATCH v7 03/12] ACPI: HMAT: Introduce 2 levels of generic port access class Dave Jiang
2024-03-08 21:59 ` [PATCH v7 04/12] ACPI: HMAT / cxl: Add retrieval of generic port coordinates for both access classes Dave Jiang
2024-03-08 21:59 ` [PATCH v7 05/12] cxl: Split out combine_coordinates() for common shared usage Dave Jiang
2024-03-08 21:59 ` [PATCH v7 06/12] cxl: Split out host bridge access coordinates Dave Jiang
2024-03-08 21:59 ` Dave Jiang [this message]
2024-03-08 21:59 ` [PATCH v7 08/12] cxl: Set cxlmd->endpoint before adding port device Dave Jiang
2024-03-08 21:59 ` [PATCH v7 09/12] cxl/region: Calculate performance data for a region Dave Jiang
2024-03-08 21:59 ` [PATCH v7 10/12] cxl/region: Add sysfs attribute for locality attributes of CXL regions Dave Jiang
2024-03-08 21:59 ` [PATCH v7 11/12] cxl/region: Add memory hotplug notifier for cxl region Dave Jiang
2024-03-12 20:03 ` Dan Williams
2024-03-08 21:59 ` [PATCH v7 12/12] cxl/region: Deal with numa nodes not enumerated by SRAT Dave Jiang
2024-03-12 21:41 ` Dan Williams
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