Re: [RFC PATCH v2 1/5] acpi: numa: Add support to enumerate and store extended linear address mode

Dave Jiang
2024-12-03T23:05:55Z

On 11/26/24 9:16 AM, Jonathan Cameron wrote:
> On Tue, 12 Nov 2024 15:12:33 -0700
> Dave Jiang <dave.jiang@intel.com> wrote:
>
>> Store the address mode as part of the cache attriutes. Export the mode
>> attribute to sysfs as all other cache attributes.
>>
>> Link: https://lore.kernel.org/linux-cxl/668333b17e4b2_5639294fd@dwillia2-xfh.jf.intel.com.notmuch/
>> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> One trivial suggestion that I don't care that much about.
>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
>> ---
>> v2:
>> - Fix spelling errors (Jonathan)
>> - Change UNKNOWN to RESERVED (Jonathan)
>> ---
>> Documentation/ABI/stable/sysfs-devices-node | 6 ++++++
>> drivers/acpi/numa/hmat.c | 3 +++
>> drivers/base/node.c | 2 ++
>> include/linux/node.h | 7 +++++++
>> 4 files changed, 18 insertions(+)
>>
>> diff --git a/Documentation/ABI/stable/sysfs-devices-node b/Documentation/ABI/stable/sysfs-devices-node
>> index 402af4b2b905..725ef0e1e01f 100644
>> --- a/Documentation/ABI/stable/sysfs-devices-node
>> +++ b/Documentation/ABI/stable/sysfs-devices-node
>> @@ -177,6 +177,12 @@ Description:
>> The cache write policy: 0 for write-back, 1 for write-through,
>> other or unknown.
>>
>> +What: /sys/devices/system/node/nodeX/memory_side_cache/indexY/mode
>
> Mode feels perhaps a bit to vague. Maybe address_mode?

ok

DJ
>
>> +Date: September 2024
>> +Contact: Dave Jiang <dave.jiang@intel.com>
>> +Description:
>> + The address mode: 0 for reserved, 1 for extended-linear.
>> +
>> What: /sys/devices/system/node/nodeX/x86/sgx_total_bytes
>> Date: November 2021
>> Contact: Jarkko Sakkinen <jarkko@kernel.org>
>> diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
>> index 1a902a02390f..39524f36be5b 100644
>> --- a/drivers/acpi/numa/hmat.c
>> +++ b/drivers/acpi/numa/hmat.c
>> @@ -506,6 +506,9 @@ static __init int hmat_parse_cache(union acpi_subtable_headers *header,
>> switch ((attrs & ACPI_HMAT_CACHE_ASSOCIATIVITY) >> 8) {
>> case ACPI_HMAT_CA_DIRECT_MAPPED:
>> tcache->cache_attrs.indexing = NODE_CACHE_DIRECT_MAP;
>> + /* Extended Linear mode is only valid if cache is direct mapped */
>> + if (cache->address_mode == ACPI_HMAT_CACHE_MODE_EXTENDED_LINEAR)
>> + tcache->cache_attrs.mode = NODE_CACHE_MODE_EXTENDED_LINEAR;
>> break;
>> case ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING:
>> tcache->cache_attrs.indexing = NODE_CACHE_INDEXED;
>