From: "Xin Li (Intel)" <xin@zytor.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
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Subject: [RFC PATCH v2 11/34] x86/msr: Remove calling native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}()
Date: Tue, 22 Apr 2025 01:21:52 -0700 [thread overview]
Message-ID: <20250422082216.1954310-12-xin@zytor.com> (raw)
In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
hpa found that pmu_msr_write() is actually a completely pointless
function [1]: all it does is shuffle some arguments, then calls
pmu_msr_chk_emulated() and if it returns true AND the emulated flag
is clear then does *exactly the same thing* that the calling code
would have done if pmu_msr_write() itself had returned true. And
pmu_msr_read() does the equivalent stupidity.
Remove the calls to native_{read,write}_msr{,_safe}() within
pmu_msr_{read,write}(). Instead reuse the existing calling code
that decides whether to call native_{read,write}_msr{,_safe}() based
on the return value from pmu_msr_{read,write}(). Consequently,
eliminate the need to pass an error pointer to pmu_msr_{read,write}().
While at it, refactor pmu_msr_write() to take the MSR value as a u64
argument, replacing the current dual u32 arguments, because the dual
u32 arguments were only used to call native_write_msr{,_safe}(), which
has now been removed.
[1]: https://lore.kernel.org/lkml/0ec48b84-d158-47c6-b14c-3563fd14bcc4@zytor.com/
Suggested-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Sign-off-by: Xin Li (Intel) <xin@zytor.com>
---
arch/x86/xen/enlighten_pv.c | 6 +++++-
arch/x86/xen/pmu.c | 27 ++++-----------------------
arch/x86/xen/xen-ops.h | 4 ++--
3 files changed, 11 insertions(+), 26 deletions(-)
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 9fbe187aff00..1418758b57ff 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1132,6 +1132,8 @@ static void set_seg(unsigned int which, unsigned int low, unsigned int high,
static void xen_do_write_msr(unsigned int msr, unsigned int low,
unsigned int high, int *err)
{
+ u64 val;
+
switch (msr) {
case MSR_FS_BASE:
set_seg(SEGBASE_FS, low, high, err);
@@ -1158,7 +1160,9 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
break;
default:
- if (!pmu_msr_write(msr, low, high, err)) {
+ val = (u64)high << 32 | low;
+
+ if (!pmu_msr_write(msr, val)) {
if (err)
*err = native_write_msr_safe(msr, low, high);
else
diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index 9c1682af620a..95caae97a394 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -313,37 +313,18 @@ static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
return true;
}
-bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
+bool pmu_msr_read(u32 msr, u64 *val)
{
bool emulated;
- if (!pmu_msr_chk_emulated(msr, val, true, &emulated))
- return false;
-
- if (!emulated) {
- *val = err ? native_read_msr_safe(msr, err)
- : native_read_msr(msr);
- }
-
- return true;
+ return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
}
-bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
+bool pmu_msr_write(u32 msr, u64 val)
{
- uint64_t val = ((uint64_t)high << 32) | low;
bool emulated;
- if (!pmu_msr_chk_emulated(msr, &val, false, &emulated))
- return false;
-
- if (!emulated) {
- if (err)
- *err = native_write_msr_safe(msr, low, high);
- else
- native_write_msr(msr, low, high);
- }
-
- return true;
+ return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
}
static u64 xen_amd_read_pmc(int counter)
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index dc886c3cc24d..a1875e10be31 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -271,8 +271,8 @@ void xen_pmu_finish(int cpu);
static inline void xen_pmu_init(int cpu) {}
static inline void xen_pmu_finish(int cpu) {}
#endif
-bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);
-bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);
+bool pmu_msr_read(u32 msr, u64 *val);
+bool pmu_msr_write(u32 msr, u64 val);
int pmu_apic_update(uint32_t reg);
u64 xen_read_pmc(int counter);
--
2.49.0
next prev parent reply other threads:[~2025-04-22 8:23 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-22 8:21 [RFC PATCH v2 00/34] MSR refactor with new MSR instructions support Xin Li (Intel)
2025-04-22 8:21 ` [RFC PATCH v2 01/34] x86/msr: Move rdtsc{,_ordered}() to <asm/tsc.h> Xin Li (Intel)
2025-04-23 14:13 ` Dave Hansen
2025-04-23 17:12 ` Xin Li
2025-04-22 8:21 ` [RFC PATCH v2 02/34] x86/msr: Remove rdpmc() Xin Li (Intel)
2025-04-23 14:23 ` Dave Hansen
2025-04-22 8:21 ` [RFC PATCH v2 03/34] x86/msr: Rename rdpmcl() to rdpmcq() Xin Li (Intel)
2025-04-23 14:24 ` Dave Hansen
2025-04-23 14:28 ` Sean Christopherson
2025-04-23 15:06 ` Dave Hansen
2025-04-23 17:23 ` Xin Li
2025-04-22 8:21 ` [RFC PATCH v2 04/34] x86/msr: Convert rdpmcq() into a function Xin Li (Intel)
2025-04-23 14:25 ` Dave Hansen
2025-04-22 8:21 ` [RFC PATCH v2 05/34] x86/msr: Return u64 consistently in Xen PMC read functions Xin Li (Intel)
2025-04-22 8:40 ` Jürgen Groß
2025-04-22 8:21 ` [RFC PATCH v2 06/34] x86/msr: Use the alternatives mechanism to read PMC Xin Li (Intel)
2025-04-22 8:38 ` Jürgen Groß
2025-04-22 9:12 ` Xin Li
2025-04-22 9:28 ` Juergen Gross
2025-04-23 7:40 ` Xin Li
2025-04-22 8:21 ` [RFC PATCH v2 07/34] x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() uses Xin Li (Intel)
2025-04-22 8:21 ` [RFC PATCH v2 08/34] x86/msr: Convert a native_wrmsr() use to native_wrmsrq() Xin Li (Intel)
2025-04-23 15:51 ` Dave Hansen
2025-04-23 17:27 ` Xin Li
2025-04-23 23:23 ` Xin Li
2025-04-22 8:21 ` [RFC PATCH v2 09/34] x86/msr: Add the native_rdmsrq() helper Xin Li (Intel)
2025-04-22 8:21 ` [RFC PATCH v2 10/34] x86/msr: Convert __rdmsr() uses to native_rdmsrq() uses Xin Li (Intel)
2025-04-22 15:09 ` Sean Christopherson
2025-04-23 9:27 ` Xin Li
2025-04-23 13:37 ` Sean Christopherson
2025-04-23 14:02 ` Dave Hansen
2025-04-22 8:21 ` Xin Li (Intel) [this message]
2025-04-24 6:25 ` [RFC PATCH v2 11/34] x86/msr: Remove calling native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}() Mi, Dapeng
2025-04-24 7:16 ` Xin Li
2025-04-22 8:21 ` [RFC PATCH v2 12/34] x86/msr: Remove pmu_msr_{read,write}() Xin Li (Intel)
2025-04-24 6:33 ` Mi, Dapeng
2025-04-24 7:21 ` Xin Li
2025-04-24 7:43 ` Mi, Dapeng
2025-04-24 7:50 ` Xin Li
2025-04-24 10:05 ` Jürgen Groß
2025-04-24 17:49 ` Xin Li
2025-04-24 21:14 ` H. Peter Anvin
2025-04-24 22:24 ` Xin Li
2025-04-22 8:21 ` [RFC PATCH v2 13/34] x86/xen/msr: Remove the error pointer argument from set_reg() Xin Li (Intel)
2025-04-24 10:11 ` Jürgen Groß
2025-04-24 17:50 ` Xin Li
2025-04-22 8:21 ` [RFC PATCH v2 14/34] x86/msr: refactor pv_cpu_ops.write_msr{_safe}() Xin Li (Intel)
2025-04-24 10:16 ` Jürgen Groß
2025-04-22 8:21 ` [RFC PATCH v2 15/34] x86/msr: Replace wrmsr(msr, low, 0) with wrmsrq(msr, low) Xin Li (Intel)
2025-04-22 8:21 ` [RFC PATCH v2 16/34] x86/msr: Change function type of native_read_msr_safe() Xin Li (Intel)
2025-04-22 8:21 ` [RFC PATCH v2 17/34] x86/cpufeatures: Add a CPU feature bit for MSR immediate form instructions Xin Li (Intel)
2025-04-22 8:21 ` [RFC PATCH v2 18/34] x86/opcode: Add immediate form MSR instructions Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 19/34] x86/extable: Add support for " Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 20/34] x86/extable: Implement EX_TYPE_FUNC_REWIND Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism to write MSR Xin Li (Intel)
2025-04-22 9:57 ` Jürgen Groß
2025-04-23 8:51 ` Xin Li
2025-04-23 16:05 ` Jürgen Groß
2025-04-24 8:06 ` Xin Li
2025-04-24 8:14 ` Jürgen Groß
2025-04-25 1:15 ` H. Peter Anvin
2025-04-25 3:44 ` H. Peter Anvin
2025-04-25 7:01 ` Jürgen Groß
2025-04-25 15:28 ` H. Peter Anvin
2025-04-25 6:51 ` Jürgen Groß
2025-04-25 12:33 ` Peter Zijlstra
2025-04-25 12:51 ` Jürgen Groß
2025-04-25 20:12 ` H. Peter Anvin
2025-04-25 15:29 ` H. Peter Anvin
2025-04-25 7:11 ` Peter Zijlstra
2025-04-22 8:22 ` [RFC PATCH v2 22/34] x86/msr: Utilize the alternatives mechanism to read MSR Xin Li (Intel)
2025-04-22 8:59 ` Jürgen Groß
2025-04-22 9:20 ` Xin Li
2025-04-22 9:57 ` Jürgen Groß
2025-04-22 11:12 ` Jürgen Groß
2025-04-23 9:03 ` Xin Li
2025-04-23 16:11 ` Jürgen Groß
2025-04-22 8:22 ` [RFC PATCH v2 23/34] x86/extable: Remove new dead code in ex_handler_msr() Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 24/34] x86/mce: Use native MSR API __native_{wr,rd}msrq() Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 25/34] x86/msr: Rename native_wrmsrq() to native_wrmsrq_no_trace() Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 26/34] x86/msr: Rename native_wrmsr() to native_wrmsr_no_trace() Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 27/34] x86/msr: Rename native_write_msr() to native_wrmsrq() Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 28/34] x86/msr: Rename native_write_msr_safe() to native_wrmsrq_safe() Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 29/34] x86/msr: Rename native_rdmsrq() to native_rdmsrq_no_trace() Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 30/34] x86/msr: Rename native_rdmsr() to native_rdmsr_no_trace() Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 31/34] x86/msr: Rename native_read_msr() to native_rdmsrq() Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 32/34] x86/msr: Rename native_read_msr_safe() to native_rdmsrq_safe() Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 33/34] x86/msr: Move the ARGS macros after the MSR read/write APIs Xin Li (Intel)
2025-04-22 8:22 ` [RFC PATCH v2 34/34] x86/msr: Convert native_rdmsr_no_trace() uses to native_rdmsrq_no_trace() uses Xin Li (Intel)
2025-04-22 15:03 ` [RFC PATCH v2 00/34] MSR refactor with new MSR instructions support Sean Christopherson
2025-04-22 17:51 ` Xin Li
2025-04-22 18:05 ` Luck, Tony
2025-04-22 19:44 ` Ingo Molnar
2025-04-22 19:51 ` Sean Christopherson
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