From: Badal Nilawar <badal.nilawar@intel.com>
To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org,
linux-pci@vger.kernel.org
Cc: anshuman.gupta@intel.com, rafael@kernel.org, lenb@kernel.org,
bhelgaas@google.com, ilpo.jarvinen@linux.intel.com,
lucas.demarchi@intel.com, rodrigo.vivi@intel.com,
varun.gupta@intel.com, ville.syrjala@linux.intel.com,
uma.shankar@intel.com
Subject: [PATCH v3 04/11] drm/xe/vrsr: Introduce flag has_vrsr
Date: Sat, 24 May 2025 00:31:48 +0530 [thread overview]
Message-ID: <20250523190155.2623462-5-badal.nilawar@intel.com> (raw)
In-Reply-To: <20250523190155.2623462-1-badal.nilawar@intel.com>
Introduce flag has_vrsr to determine if platform supports VRSR feature
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
drivers/gpu/drm/xe/xe_device_types.h | 2 ++
drivers/gpu/drm/xe/xe_pci.c | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index f81be293b260..e2749ed2a61f 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -334,6 +334,8 @@ struct xe_device {
u8 has_sriov:1;
/** @info.has_usm: Device has unified shared memory support */
u8 has_usm:1;
+ /** @info.has_vrsr: Has capability to enter into VRAM self refresh */
+ u8 has_vrsr:1;
/** @info.has_64bit_timestamp: Device supports 64-bit timestamps */
u8 has_64bit_timestamp:1;
/** @info.is_dgfx: is discrete device */
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 024175cfe61e..46a99d6ef1a5 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -68,6 +68,7 @@ struct xe_device_desc {
u8 has_llc:1;
u8 has_pxp:1;
u8 has_sriov:1;
+ u8 has_vrsr:1;
u8 needs_scratch:1;
u8 skip_guc_pc:1;
u8 skip_mtcfg:1;
@@ -342,6 +343,7 @@ static const struct xe_device_desc bmg_desc = {
.dma_mask_size = 46,
.has_display = true,
.has_fan_control = true,
+ .has_vrsr = true,
.has_heci_cscfi = 1,
.needs_scratch = true,
};
@@ -589,6 +591,7 @@ static int xe_info_init_early(struct xe_device *xe,
xe->info.has_llc = desc->has_llc;
xe->info.has_pxp = desc->has_pxp;
xe->info.has_sriov = desc->has_sriov;
+ xe->info.has_vrsr = desc->has_vrsr;
xe->info.skip_guc_pc = desc->skip_guc_pc;
xe->info.skip_mtcfg = desc->skip_mtcfg;
xe->info.skip_pcode = desc->skip_pcode;
--
2.34.1
next prev parent reply other threads:[~2025-05-23 19:00 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-23 19:01 [PATCH v3 00/11] VRAM Self Refresh Badal Nilawar
2025-05-23 19:01 ` [PATCH v3 01/11] PCI/ACPI: Add D3cold Aux Power Limit_DSM method Badal Nilawar
2025-05-24 6:00 ` Sathyanarayanan Kuppuswamy
2025-05-29 6:18 ` Nilawar, Badal
2025-05-29 7:11 ` Nilawar, Badal
2025-05-23 19:01 ` [PATCH v3 02/11] PCI/ACPI: Per root port allow one Aux power limit request Badal Nilawar
2025-05-23 19:01 ` [PATCH v3 03/11] PCI/ACPI: Add PERST# Assertion Delay _DSM method Badal Nilawar
2025-05-23 19:01 ` Badal Nilawar [this message]
2025-05-23 19:01 ` [PATCH v3 05/11] drm/xe/vrsr: Detect VRSR Capability Badal Nilawar
2025-05-23 19:01 ` [PATCH v3 06/11] drm/xe/vrsr: Initialize VRSR feature Badal Nilawar
2025-05-23 21:33 ` kernel test robot
2025-05-23 19:01 ` [PATCH v3 07/11] drm/xe/vrsr: Enable VRSR on default VGA boot device Badal Nilawar
2025-05-23 22:04 ` kernel test robot
2025-05-23 19:01 ` [PATCH v3 08/11] drm/xe/vrsr: Refactor d3cold.allowed to a enum Badal Nilawar
2025-05-23 19:01 ` [PATCH v3 09/11] drm/xe/pm: D3Cold target state Badal Nilawar
2025-05-23 19:01 ` [PATCH v3 10/11] drm/xe/vrsr: Enable VRSR Badal Nilawar
2025-05-23 19:01 ` [PATCH v3 11/11] drm/xe/vrsr: Introduce a debugfs node named vrsr_capable Badal Nilawar
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