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Wysocki" , Palmer Dabbelt , Paul Walmsley , Alexandre Ghiti , Len Brown , Atish Patra , Anup Patel , Will Deacon , Mark Rutland , linux-acpi@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/2] RISC-V: Add common csr_read_num() and csr_write_num() functions Message-ID: <20250818-ba7d5f923321feb836a408db@orel> References: <20250818143600.894385-1-apatel@ventanamicro.com> <20250818143600.894385-3-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250818143600.894385-3-apatel@ventanamicro.com> On Mon, Aug 18, 2025 at 08:06:00PM +0530, Anup Patel wrote: > In RISC-V, there is no CSR read/write instruction which takes CSR > number via register so add common csr_read_num() and csr_write_num() > functions which allow accessing certain CSRs by passing CSR number > as parameter. These common functions will be first used by the > ACPI CPPC driver and RISC-V PMU driver. > > Signed-off-by: Anup Patel > Reviewed-by: Sunil V L > --- > arch/riscv/include/asm/csr.h | 3 + > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/csr.c | 165 +++++++++++++++++++++++++++++++++++ > drivers/acpi/riscv/cppc.c | 17 ++-- > drivers/perf/riscv_pmu.c | 54 ++---------- > 5 files changed, 184 insertions(+), 56 deletions(-) > create mode 100644 arch/riscv/kernel/csr.c > Reviewed-by: Andrew Jones