From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B224C30648A; Fri, 12 Sep 2025 12:02:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.176.79.56 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757678546; cv=none; b=oOsVj54PmYFB7DvYu1aA9/nxmrCXsNh/aDYHz82dyRIpY0pi55RwYT+zcq0LbNWC6eVUhgsx73v3FmwJomuknYOAL5/JJw2xzzZOPnRH4Py39mVoV9i4BwFIFZ78AYRGJTn3qZ/GZC2rb9l4dhsTdOxlsUQQA16OEoVuDTdF3pM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757678546; c=relaxed/simple; bh=hH3outgkrKdulZ1sBiYLYLbGs1Lo0Esa/yBQm/pG/Ng=; h=Date:From:To:CC:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=RRGZZXD/2IUTmjLIVYyeT8C0Ru8JDdgqjUfHQ2vr8CjfF16bxjWNmHioGmrDAVqG5ZdOcyTVan33MNAj3ULyXxMJVMai9G68hP4hJQs1mnM+V9K+IAi2hVQjCjTU2CVbbtEheO+a83mV/18Ylmn3FczcDC+7qwg/rfYROMi2vHk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=185.176.79.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.18.186.231]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4cNXzG0LBnz6M4b8; Fri, 12 Sep 2025 19:59:38 +0800 (CST) Received: from frapeml500008.china.huawei.com (unknown [7.182.85.71]) by mail.maildlp.com (Postfix) with ESMTPS id 61A8214038F; Fri, 12 Sep 2025 20:02:19 +0800 (CST) Received: from localhost (10.203.177.15) by frapeml500008.china.huawei.com (7.182.85.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Fri, 12 Sep 2025 14:02:18 +0200 Date: Fri, 12 Sep 2025 13:02:16 +0100 From: Jonathan Cameron To: James Morse CC: , , , D Scott Phillips OS , , , , , , Jamie Iles , Xin Hao , , , , David Hildenbrand , Dave Martin , Koba Ko , Shanker Donthineni , , , Rob Herring , Rohit Mathew , "Rafael Wysocki" , Len Brown , Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , "Will Deacon" , Greg Kroah-Hartman , Danilo Krummrich Subject: Re: [PATCH v2 17/29] arm_mpam: Extend reset logic to allow devices to be reset any time Message-ID: <20250912130216.00006d92@huawei.com> In-Reply-To: <20250910204309.20751-18-james.morse@arm.com> References: <20250910204309.20751-1-james.morse@arm.com> <20250910204309.20751-18-james.morse@arm.com> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.42; x86_64-w64-mingw32) Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: lhrpeml500012.china.huawei.com (7.191.174.4) To frapeml500008.china.huawei.com (7.182.85.71) On Wed, 10 Sep 2025 20:42:57 +0000 James Morse wrote: > cpuhp callbacks aren't the only time the MSC configuration may need to > be reset. Resctrl has an API call to reset a class. > If an MPAM error interrupt arrives it indicates the driver has > misprogrammed an MSC. The safest thing to do is reset all the MSCs > and disable MPAM. > > Add a helper to reset RIS via their class. Call this from mpam_disable(), > which can be scheduled from the error interrupt handler. > > Signed-off-by: James Morse > --- > Changes since v1: > * more complete use of _srcu helpers. > * Use guard macro for srcu. I'm not seeing a strong reason for doing this for the case here and not for cases in earlier patches like in mpam_cpu_online() I'm a fan of using these broadly in a given code base, so would guard(srcu) in those earlier patches as well. Anyhow, one other trivial thing inline that you can ignore or not as you wish. Reviewed-by: Jonathan Cameron > * Dropped a might_sleep() - something else will bark. > --- > drivers/resctrl/mpam_devices.c | 56 ++++++++++++++++++++++++++++++++-- > 1 file changed, 54 insertions(+), 2 deletions(-) > > diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c > index e7faf453b5d7..a9d3c4b09976 100644 > --- a/drivers/resctrl/mpam_devices.c > +++ b/drivers/resctrl/mpam_devices.c > @@ -842,8 +842,6 @@ static int mpam_reset_ris(void *arg) > u16 partid, partid_max; > struct mpam_msc_ris *ris = arg; > > - mpam_assert_srcu_read_lock_held(); > - > if (ris->in_reset_state) > return 0; > > @@ -1340,8 +1338,56 @@ static void mpam_enable_once(void) > mpam_partid_max + 1, mpam_pmg_max + 1); > } > > +static void mpam_reset_component_locked(struct mpam_component *comp) > +{ > + struct mpam_msc *msc; > + struct mpam_vmsc *vmsc; > + struct mpam_msc_ris *ris; > + > + lockdep_assert_cpus_held(); > + > + guard(srcu)(&mpam_srcu); > + list_for_each_entry_srcu(vmsc, &comp->vmsc, comp_list, > + srcu_read_lock_held(&mpam_srcu)) { > + msc = vmsc->msc; Might be worth reducing scope of msc and ris > + > + list_for_each_entry_srcu(ris, &vmsc->ris, vmsc_list, > + srcu_read_lock_held(&mpam_srcu)) { > + if (!ris->in_reset_state) > + mpam_touch_msc(msc, mpam_reset_ris, ris); > + ris->in_reset_state = true; > + } > + } > +}