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From: Marc Zyngier <maz@kernel.org>
To: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Mark Rutland <mark.rutland@arm.com>,
	Will Deacon <will@kernel.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Saravana Kannan <saravanak@google.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Sven Peter <sven@kernel.org>, Janne Grunau <j@jannau.net>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	James Clark <james.clark@linaro.org>,
	Jonathan Cameron <jonathan.cameron@huawei.com>
Subject: [PATCH v3 21/26] irqchip/gic-v3: Drop support for custom PPI partitions
Date: Mon, 22 Sep 2025 09:28:28 +0100	[thread overview]
Message-ID: <20250922082833.2038905-22-maz@kernel.org> (raw)
In-Reply-To: <20250922082833.2038905-1-maz@kernel.org>

The only thing getting in the way of correctly handling PPIs the way
they were intended is the GICv3 hack that deals with PPI partitions.

Remove that code, allowing the common code to kick in.

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 drivers/irqchip/Kconfig      |   1 -
 drivers/irqchip/irq-gic-v3.c | 133 +++--------------------------------
 2 files changed, 8 insertions(+), 126 deletions(-)

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 6d12c6ab9ea47..c31d2f99d7b91 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -36,7 +36,6 @@ config GIC_NON_BANKED
 config ARM_GIC_V3
 	bool
 	select IRQ_DOMAIN_HIERARCHY
-	select PARTITION_PERCPU
 	select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
 	select HAVE_ARM_SMCCC_DISCOVERY
 	select IRQ_MSI_IOMMU
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 8b615a2ee463d..efb513e79bc55 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -26,7 +26,6 @@
 #include <linux/irqchip/arm-gic-common.h>
 #include <linux/irqchip/arm-gic-v3.h>
 #include <linux/irqchip/arm-gic-v3-prio.h>
-#include <linux/irqchip/irq-partition-percpu.h>
 #include <linux/bitfield.h>
 #include <linux/bits.h>
 #include <linux/arm-smccc.h>
@@ -46,8 +45,6 @@ static u8 dist_prio_nmi __ro_after_init = GICV3_PRIO_NMI;
 #define FLAGS_WORKAROUND_ASR_ERRATUM_8601001	(1ULL << 2)
 #define FLAGS_WORKAROUND_INSECURE		(1ULL << 3)
 
-#define GIC_IRQ_TYPE_PARTITION	(GIC_IRQ_TYPE_LPI + 1)
-
 static struct cpumask broken_rdists __read_mostly __maybe_unused;
 
 struct redist_region {
@@ -68,11 +65,15 @@ struct gic_chip_data {
 	u64			flags;
 	bool			has_rss;
 	unsigned int		ppi_nr;
-	struct partition_desc	**ppi_descs;
 	struct partition_affinity *parts;
 	unsigned int		nr_parts;
 };
 
+struct partition_affinity {
+	cpumask_t			mask;
+	struct fwnode_handle		*partition_id;
+};
+
 #define T241_CHIPS_MAX		4
 static void __iomem *t241_dist_base_alias[T241_CHIPS_MAX] __read_mostly;
 static DEFINE_STATIC_KEY_FALSE(gic_nvidia_t241_erratum);
@@ -593,18 +594,6 @@ static void gic_irq_set_prio(struct irq_data *d, u8 prio)
 	writeb_relaxed(prio, base + offset + index);
 }
 
-static u32 __gic_get_ppi_index(irq_hw_number_t hwirq)
-{
-	switch (__get_intid_range(hwirq)) {
-	case PPI_RANGE:
-		return hwirq - 16;
-	case EPPI_RANGE:
-		return hwirq - EPPI_BASE_INTID + 16;
-	default:
-		unreachable();
-	}
-}
-
 static int gic_irq_nmi_setup(struct irq_data *d)
 {
 	struct irq_desc *desc = irq_to_desc(d->irq);
@@ -1628,13 +1617,6 @@ static int gic_irq_domain_translate(struct irq_domain *d,
 		case GIC_IRQ_TYPE_LPI:	/* LPI */
 			*hwirq = fwspec->param[1];
 			break;
-		case GIC_IRQ_TYPE_PARTITION:
-			*hwirq = fwspec->param[1];
-			if (fwspec->param[1] >= 16)
-				*hwirq += EPPI_BASE_INTID - 16;
-			else
-				*hwirq += 16;
-			break;
 		default:
 			return -EINVAL;
 		}
@@ -1643,10 +1625,8 @@ static int gic_irq_domain_translate(struct irq_domain *d,
 
 		/*
 		 * Make it clear that broken DTs are... broken.
-		 * Partitioned PPIs are an unfortunate exception.
 		 */
-		WARN_ON(*type == IRQ_TYPE_NONE &&
-			fwspec->param[0] != GIC_IRQ_TYPE_PARTITION);
+		WARN_ON(*type == IRQ_TYPE_NONE);
 		return 0;
 	}
 
@@ -1703,32 +1683,11 @@ static void gic_irq_domain_free(struct irq_domain *domain, unsigned int virq,
 	}
 }
 
-static bool fwspec_is_partitioned_ppi(struct irq_fwspec *fwspec,
-				      irq_hw_number_t hwirq)
-{
-	enum gic_intid_range range;
-
-	if (!gic_data.ppi_descs)
-		return false;
-
-	if (!is_of_node(fwspec->fwnode))
-		return false;
-
-	if (fwspec->param_count < 4 || !fwspec->param[3])
-		return false;
-
-	range = __get_intid_range(hwirq);
-	if (range != PPI_RANGE && range != EPPI_RANGE)
-		return false;
-
-	return true;
-}
-
 static int gic_irq_domain_select(struct irq_domain *d,
 				 struct irq_fwspec *fwspec,
 				 enum irq_domain_bus_token bus_token)
 {
-	unsigned int type, ret, ppi_idx;
+	unsigned int type, ret;
 	irq_hw_number_t hwirq;
 
 	/* Not for us */
@@ -1747,15 +1706,7 @@ static int gic_irq_domain_select(struct irq_domain *d,
 	if (WARN_ON_ONCE(ret))
 		return 0;
 
-	if (!fwspec_is_partitioned_ppi(fwspec, hwirq))
-		return d == gic_data.domain;
-
-	/*
-	 * If this is a PPI and we have a 4th (non-null) parameter,
-	 * then we need to match the partition domain.
-	 */
-	ppi_idx = __gic_get_ppi_index(hwirq);
-	return d == partition_get_domain(gic_data.ppi_descs[ppi_idx]);
+	return d == gic_data.domain;
 }
 
 static int gic_irq_get_fwspec_info(struct irq_fwspec *fwspec, struct irq_fwspec_info *info)
@@ -1812,45 +1763,6 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
 	.get_fwspec_info = gic_irq_get_fwspec_info,
 };
 
-static int partition_domain_translate(struct irq_domain *d,
-				      struct irq_fwspec *fwspec,
-				      unsigned long *hwirq,
-				      unsigned int *type)
-{
-	unsigned long ppi_intid;
-	struct device_node *np;
-	unsigned int ppi_idx;
-	int ret;
-
-	if (!gic_data.ppi_descs)
-		return -ENOMEM;
-
-	np = of_find_node_by_phandle(fwspec->param[3]);
-	if (WARN_ON(!np))
-		return -EINVAL;
-
-	ret = gic_irq_domain_translate(d, fwspec, &ppi_intid, type);
-	if (WARN_ON_ONCE(ret))
-		return 0;
-
-	ppi_idx = __gic_get_ppi_index(ppi_intid);
-	ret = partition_translate_id(gic_data.ppi_descs[ppi_idx],
-				     of_fwnode_handle(np));
-	if (ret < 0)
-		return ret;
-
-	*hwirq = ret;
-	*type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
-
-	return 0;
-}
-
-static const struct irq_domain_ops partition_domain_ops = {
-	.translate = partition_domain_translate,
-	.select = gic_irq_domain_select,
-	.get_fwspec_info = gic_irq_get_fwspec_info,
-};
-
 static bool gic_enable_quirk_msm8996(void *data)
 {
 	struct gic_chip_data *d = data;
@@ -2173,12 +2085,7 @@ static void __init gic_populate_ppi_partitions(struct device_node *gic_node)
 	if (!parts_node)
 		return;
 
-	gic_data.ppi_descs = kcalloc(gic_data.ppi_nr, sizeof(*gic_data.ppi_descs), GFP_KERNEL);
-	if (!gic_data.ppi_descs)
-		goto out_put_node;
-
 	nr_parts = of_get_child_count(parts_node);
-
 	if (!nr_parts)
 		goto out_put_node;
 
@@ -2234,30 +2141,6 @@ static void __init gic_populate_ppi_partitions(struct device_node *gic_node)
 	gic_data.parts = parts;
 	gic_data.nr_parts = nr_parts;
 
-	for (i = 0; i < gic_data.ppi_nr; i++) {
-		unsigned int irq;
-		struct partition_desc *desc;
-		struct irq_fwspec ppi_fwspec = {
-			.fwnode		= gic_data.fwnode,
-			.param_count	= 3,
-			.param		= {
-				[0]	= GIC_IRQ_TYPE_PARTITION,
-				[1]	= i,
-				[2]	= IRQ_TYPE_NONE,
-			},
-		};
-
-		irq = irq_create_fwspec_mapping(&ppi_fwspec);
-		if (WARN_ON(!irq))
-			continue;
-		desc = partition_create_desc(gic_data.fwnode, parts, nr_parts,
-					     irq, &partition_domain_ops);
-		if (WARN_ON(!desc))
-			continue;
-
-		gic_data.ppi_descs[i] = desc;
-	}
-
 out_put_node:
 	of_node_put(parts_node);
 }
-- 
2.47.3


  parent reply	other threads:[~2025-09-22  8:28 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-22  8:28 [PATCH v3 00/26] genirq: Add support for percpu_devid IRQ affinity Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 01/26] irqdomain: Add firmware info reporting interface Marc Zyngier
2025-10-09 16:42   ` Jonathan Cameron
2025-09-22  8:28 ` [PATCH v3 02/26] ACPI: irq: Add IRQ affinity " Marc Zyngier
2025-09-22 17:10   ` Rafael J. Wysocki
2025-10-09 16:47   ` Jonathan Cameron
2025-09-22  8:28 ` [PATCH v3 03/26] of/irq: " Marc Zyngier
2025-10-09 16:49   ` Jonathan Cameron
2025-10-20 10:47     ` Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 04/26] platform: Add firmware-agnostic irq and affinity retrieval interface Marc Zyngier
2025-10-09 17:03   ` Jonathan Cameron
2025-10-20 10:44     ` Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 05/26] irqchip/gic-v3: Add FW info retrieval support Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 06/26] irqchip/apple-aic: " Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 07/26] coresight: trbe: Convert to new IRQ affinity retrieval API Marc Zyngier
2025-09-23 11:17   ` Suzuki K Poulose
2025-09-22  8:28 ` [PATCH v3 08/26] perf: arm_pmu: " Marc Zyngier
2025-10-10  3:39   ` Jinjie Ruan
2025-09-22  8:28 ` [PATCH v3 09/26] perf: arm_spe_pmu: " Marc Zyngier
2025-10-10  3:41   ` Jinjie Ruan
2025-09-22  8:28 ` [PATCH v3 10/26] irqchip/gic-v3: Switch high priority PPIs over to handle_percpu_devid_irq() Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 11/26] genirq: Kill handle_percpu_devid_fasteoi_nmi() Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 12/26] genirq: Merge irqaction::{dev_id,percpu_dev_id} Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 13/26] genirq: Factor-in percpu irqaction creation Marc Zyngier
2025-10-10  3:59   ` Jinjie Ruan
2025-10-10  9:28     ` Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 14/26] genirq: Add affinity to percpu_devid interrupt requests Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 15/26] genirq: Update request_percpu_nmi() to take an affinity Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 16/26] genirq: Allow per-cpu interrupt sharing for non-overlapping affinities Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 17/26] genirq: Add request_percpu_irq_affinity() helper Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 18/26] perf: arm_pmu: Request specific affinities for percpu NMI/IRQ Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 19/26] perf: arm_spe_pmu: Request specific affinities for percpu IRQ Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 20/26] coresight: trbe: " Marc Zyngier
2025-09-22  8:28 ` Marc Zyngier [this message]
2025-09-22  8:28 ` [PATCH v3 22/26] irqchip/apple-aic: Drop support for custom PMU irq partitions Marc Zyngier
2025-09-22 18:43   ` Sven Peter
2025-09-22 20:24     ` Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 23/26] irqchip: Kill irq-partition-percpu Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 24/26] genirq: Kill irq_{g,s}et_percpu_devid_partition() Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 25/26] irqdomain: Kill of_node_to_fwnode() helper Marc Zyngier
2025-09-22  8:28 ` [PATCH v3 26/26] perf: arm_pmu: Kill last use of per-CPU cpu_armpmu pointer Marc Zyngier
2025-09-23 10:00 ` [PATCH v3 00/26] genirq: Add support for percpu_devid IRQ affinity Will Deacon
2025-09-23 10:09   ` Marc Zyngier
2025-09-26 10:38 ` Alexandru Elisei

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