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X-CSE-ConnectionGUID: GZXOT29oRHujRImzIKc+ZQ== X-CSE-MsgGUID: GvfVYKXPQ1aYGUSQk2Hnng== X-IronPort-AV: E=McAfee;i="6800,10657,11582"; a="61891467" X-IronPort-AV: E=Sophos;i="6.19,230,1754982000"; d="scan'208";a="61891467" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Oct 2025 01:02:41 -0700 X-CSE-ConnectionGUID: nA6wDb3gQTKjCbOtCFab1A== X-CSE-MsgGUID: ET0fsUUVR3uRpVp9FNHEAA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,230,1754982000"; d="scan'208";a="205805384" Received: from bnilawar-desk2.iind.intel.com ([10.190.239.41]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Oct 2025 01:02:37 -0700 From: Badal Nilawar To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: anshuman.gupta@intel.com, rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com, karthik.poosa@intel.com Subject: [PATCH v5 04/12] drm/xe/vrsr: Introduce flag has_vrsr Date: Wed, 15 Oct 2025 13:37:02 +0530 Message-Id: <20251015080710.1468409-5-badal.nilawar@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251015080710.1468409-1-badal.nilawar@intel.com> References: <20251015080710.1468409-1-badal.nilawar@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce flag has_vrsr to determine if platform supports VRSR feature Cc: Rodrigo Vivi Signed-off-by: Badal Nilawar Reviewed-by: Karthik Poosa --- drivers/gpu/drm/xe/xe_device_types.h | 2 ++ drivers/gpu/drm/xe/xe_pci.c | 2 ++ drivers/gpu/drm/xe/xe_pci_types.h | 1 + 3 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index 02c04ad7296e..7fbdb5545946 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -313,6 +313,8 @@ struct xe_device { u8 has_sriov:1; /** @info.has_usm: Device has unified shared memory support */ u8 has_usm:1; + /** @info.has_vrsr: Has capability to enter into VRAM self refresh */ + u8 has_vrsr:1; /** @info.has_64bit_timestamp: Device supports 64-bit timestamps */ u8 has_64bit_timestamp:1; /** @info.is_dgfx: is discrete device */ diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index 24a38904bb50..0cc14ddd92de 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -350,6 +350,7 @@ static const struct xe_device_desc bmg_desc = { .has_heci_cscfi = 1, .has_late_bind = true, .has_sriov = true, + .has_vrsr = true, .max_gt_per_tile = 2, .needs_scratch = true, .subplatforms = (const struct xe_subplatform_desc[]) { @@ -633,6 +634,7 @@ static int xe_info_init_early(struct xe_device *xe, xe->info.has_pxp = desc->has_pxp; xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) && desc->has_sriov; + xe->info.has_vrsr = desc->has_vrsr; xe->info.skip_guc_pc = desc->skip_guc_pc; xe->info.skip_mtcfg = desc->skip_mtcfg; xe->info.skip_pcode = desc->skip_pcode; diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h index a4451bdc79fb..ad5b024ede1e 100644 --- a/drivers/gpu/drm/xe/xe_pci_types.h +++ b/drivers/gpu/drm/xe/xe_pci_types.h @@ -48,6 +48,7 @@ struct xe_device_desc { u8 has_mbx_power_limits:1; u8 has_pxp:1; u8 has_sriov:1; + u8 has_vrsr:1; u8 needs_scratch:1; u8 skip_guc_pc:1; u8 skip_mtcfg:1; -- 2.34.1