From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <x86@kernel.org>, Tony Luck <tony.luck@intel.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <linux-edac@vger.kernel.org>,
<Smita.KoralahalliChannabasappa@amd.com>,
Qiuxu Zhuo <qiuxu.zhuo@intel.com>,
Nikolay Borisov <nik.borisov@suse.com>,
Bert Karwatzki <spasswolf@web.de>, <linux-acpi@vger.kernel.org>,
Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v8 5/8] x86/mce/amd: Remove redundant reset_block()
Date: Tue, 4 Nov 2025 14:55:42 +0000 [thread overview]
Message-ID: <20251104-wip-mca-updates-v8-5-66c8eacf67b9@amd.com> (raw)
In-Reply-To: <20251104-wip-mca-updates-v8-0-66c8eacf67b9@amd.com>
Many of the checks in reset_block() are done again in the block reset
function. So drop the redundant checks.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Notes:
Link:
https://lore.kernel.org/r/20251016-wip-mca-updates-v7-5-5c139a4062cb@amd.com
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* New in v4.
arch/x86/kernel/cpu/mce/amd.c | 28 +++++++---------------------
1 file changed, 7 insertions(+), 21 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
index 6d16b4589eef..af2221bcba96 100644
--- a/arch/x86/kernel/cpu/mce/amd.c
+++ b/arch/x86/kernel/cpu/mce/amd.c
@@ -812,29 +812,11 @@ static void amd_deferred_error_interrupt(void)
machine_check_poll(MCP_TIMESTAMP, &this_cpu_ptr(&mce_amd_data)->dfr_intr_banks);
}
-static void reset_block(struct threshold_block *block)
-{
- struct thresh_restart tr;
- u32 low = 0, high = 0;
-
- if (!block)
- return;
-
- if (rdmsr_safe(block->address, &low, &high))
- return;
-
- if (!(high & MASK_OVERFLOW_HI))
- return;
-
- memset(&tr, 0, sizeof(tr));
- tr.b = block;
- threshold_restart_block(&tr);
-}
-
static void amd_reset_thr_limit(unsigned int bank)
{
struct threshold_bank **bp = this_cpu_read(threshold_banks);
struct threshold_block *block, *tmp;
+ struct thresh_restart tr;
/*
* Validate that the threshold bank has been initialized already. The
@@ -844,8 +826,12 @@ static void amd_reset_thr_limit(unsigned int bank)
if (!bp || !bp[bank])
return;
- list_for_each_entry_safe(block, tmp, &bp[bank]->miscj, miscj)
- reset_block(block);
+ memset(&tr, 0, sizeof(tr));
+
+ list_for_each_entry_safe(block, tmp, &bp[bank]->miscj, miscj) {
+ tr.b = block;
+ threshold_restart_block(&tr);
+ }
}
/*
--
2.51.2
next prev parent reply other threads:[~2025-11-04 14:56 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-04 14:55 [PATCH v8 0/8] AMD MCA interrupts rework Yazen Ghannam
2025-11-04 14:55 ` [PATCH v8 1/8] x86/mce: Unify AMD THR handler with MCA Polling Yazen Ghannam
2025-11-04 14:55 ` [PATCH v8 2/8] x86/mce: Unify AMD DFR " Yazen Ghannam
2025-11-04 14:55 ` [PATCH v8 3/8] x86/mce/amd: Enable interrupt vectors once per-CPU on SMCA systems Yazen Ghannam
2025-11-04 14:55 ` [PATCH v8 4/8] x86/mce/amd: Support SMCA Corrected Error Interrupt Yazen Ghannam
2025-11-04 14:55 ` Yazen Ghannam [this message]
2025-11-04 14:55 ` [PATCH v8 6/8] x86/mce/amd: Define threshold restart function for banks Yazen Ghannam
2025-11-04 14:55 ` [PATCH v8 7/8] x86/mce: Handle AMD threshold interrupt storms Yazen Ghannam
2025-11-04 14:55 ` [PATCH v8 8/8] x86/mce: Save and use APEI corrected threshold limit Yazen Ghannam
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