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From: Sumit Gupta <sumitg@nvidia.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>, <lenb@kernel.org>,
	<robert.moore@intel.com>, <corbet@lwn.net>,
	<pierre.gondois@arm.com>, <zhenglifeng1@huawei.com>,
	<rdunlap@infradead.org>, <ray.huang@amd.com>,
	<gautham.shenoy@amd.com>, <mario.limonciello@amd.com>,
	<perry.yuan@amd.com>, <ionela.voinescu@arm.com>,
	<zhanjie9@hisilicon.com>, <linux-pm@vger.kernel.org>,
	<linux-acpi@vger.kernel.org>, <linux-doc@vger.kernel.org>,
	<acpica-devel@lists.linux.dev>, <linux-kernel@vger.kernel.org>
Cc: <linux-tegra@vger.kernel.org>, <treding@nvidia.com>,
	<jonathanh@nvidia.com>, <vsethi@nvidia.com>,
	<ksitaraman@nvidia.com>, <sanjayc@nvidia.com>,
	<nhartman@nvidia.com>, <bbasu@nvidia.com>, <sumitg@nvidia.com>
Subject: [PATCH v5 04/11] ACPI: CPPC: Extend cppc_set_epp_perf() to support auto_sel and epp
Date: Tue, 23 Dec 2025 17:43:00 +0530	[thread overview]
Message-ID: <20251223121307.711773-5-sumitg@nvidia.com> (raw)
In-Reply-To: <20251223121307.711773-1-sumitg@nvidia.com>

Extend cppc_set_epp_perf() to write both auto_sel and energy_perf
registers when they are in FFH or SystemMemory address space.

This keeps the behavior consistent with PCC case where both registers
are already updated together, but was missing for FFH/SystemMemory.

Also update EPP constants for better clarity:
- Add CPPC_EPP_PERFORMANCE_PREF (0x00) for performance preference
- Add CPPC_EPP_ENERGY_EFFICIENCY_PREF (0xFF) for energy efficiency

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
---
 drivers/acpi/cppc_acpi.c | 35 +++++++++++++++++++++++++++++------
 include/acpi/cppc_acpi.h |  3 ++-
 2 files changed, 31 insertions(+), 7 deletions(-)

diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
index a4e89fe6aab5..403ee988a8c6 100644
--- a/drivers/acpi/cppc_acpi.c
+++ b/drivers/acpi/cppc_acpi.c
@@ -1556,6 +1556,8 @@ int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
 	struct cpc_register_resource *auto_sel_reg;
 	struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);
 	struct cppc_pcc_data *pcc_ss_data = NULL;
+	bool autosel_ffh_sysmem;
+	bool epp_ffh_sysmem;
 	int ret;
 
 	if (!cpc_desc) {
@@ -1566,6 +1568,11 @@ int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
 	auto_sel_reg = &cpc_desc->cpc_regs[AUTO_SEL_ENABLE];
 	epp_set_reg = &cpc_desc->cpc_regs[ENERGY_PERF];
 
+	epp_ffh_sysmem = CPC_SUPPORTED(epp_set_reg) &&
+		(CPC_IN_FFH(epp_set_reg) || CPC_IN_SYSTEM_MEMORY(epp_set_reg));
+	autosel_ffh_sysmem = CPC_SUPPORTED(auto_sel_reg) &&
+		(CPC_IN_FFH(auto_sel_reg) || CPC_IN_SYSTEM_MEMORY(auto_sel_reg));
+
 	if (CPC_IN_PCC(epp_set_reg) || CPC_IN_PCC(auto_sel_reg)) {
 		if (pcc_ss_id < 0) {
 			pr_debug("Invalid pcc_ss_id for CPU:%d\n", cpu);
@@ -1590,14 +1597,30 @@ int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
 		/* after writing CPC, transfer the ownership of PCC to platform */
 		ret = send_pcc_cmd(pcc_ss_id, CMD_WRITE);
 		up_write(&pcc_ss_data->pcc_lock);
-	} else if (osc_cpc_flexible_adr_space_confirmed &&
-		   CPC_SUPPORTED(epp_set_reg) && CPC_IN_FFH(epp_set_reg)) {
-		ret = cpc_write(cpu, epp_set_reg, perf_ctrls->energy_perf);
+	} else if (osc_cpc_flexible_adr_space_confirmed) {
+		if (!epp_ffh_sysmem && !autosel_ffh_sysmem) {
+			ret = -EOPNOTSUPP;
+		} else {
+			if (autosel_ffh_sysmem) {
+				ret = cpc_write(cpu, auto_sel_reg, enable);
+				if (ret)
+					return ret;
+			}
+
+			if (epp_ffh_sysmem) {
+				ret = cpc_write(cpu, epp_set_reg,
+						perf_ctrls->energy_perf);
+				if (ret)
+					return ret;
+			}
+		}
 	} else {
-		ret = -ENOTSUPP;
-		pr_debug("_CPC in PCC and _CPC in FFH are not supported\n");
+		ret = -EOPNOTSUPP;
 	}
 
+	if (ret == -EOPNOTSUPP)
+		pr_debug("CPU%d: _CPC not in PCC/FFH/SystemMemory\n", cpu);
+
 	return ret;
 }
 EXPORT_SYMBOL_GPL(cppc_set_epp_perf);
@@ -1609,7 +1632,7 @@ EXPORT_SYMBOL_GPL(cppc_set_epp_perf);
  */
 int cppc_set_epp(int cpu, u64 epp_val)
 {
-	if (epp_val > CPPC_ENERGY_PERF_MAX)
+	if (epp_val > CPPC_EPP_ENERGY_EFFICIENCY_PREF)
 		return -EINVAL;
 
 	return cppc_set_reg_val(cpu, ENERGY_PERF, epp_val);
diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h
index 12a1dc31bf2a..2860a0252313 100644
--- a/include/acpi/cppc_acpi.h
+++ b/include/acpi/cppc_acpi.h
@@ -39,7 +39,8 @@
 /* CPPC_AUTO_ACT_WINDOW_MAX_SIG is 127, so 128 and 129 will decay to 127 when writing */
 #define CPPC_AUTO_ACT_WINDOW_SIG_CARRY_THRESH 129
 
-#define CPPC_ENERGY_PERF_MAX	(0xFF)
+#define CPPC_EPP_PERFORMANCE_PREF		0x00
+#define CPPC_EPP_ENERGY_EFFICIENCY_PREF		0xFF
 
 /* Each register has the folowing format. */
 struct cpc_reg {
-- 
2.34.1


  parent reply	other threads:[~2025-12-23 12:14 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-23 12:12 [PATCH v5 00/11] Enhanced autonomous selection and improvements Sumit Gupta
2025-12-23 12:12 ` [PATCH v5 01/11] cpufreq: CPPC: Add generic helpers for sysfs show/store Sumit Gupta
2025-12-25  3:41   ` zhenglifeng (A)
2026-01-08 13:31     ` Sumit Gupta
2025-12-23 12:12 ` [PATCH v5 02/11] ACPI: CPPC: Clean up cppc_perf_caps and cppc_perf_ctrls structs Sumit Gupta
2026-01-08 13:43   ` Pierre Gondois
2025-12-23 12:12 ` [PATCH v5 03/11] ACPI: CPPC: Add cppc_get_perf() API to read performance controls Sumit Gupta
2025-12-25  8:21   ` zhenglifeng (A)
2026-01-08 13:36     ` Sumit Gupta
2025-12-23 12:13 ` Sumit Gupta [this message]
2025-12-25  3:56   ` [PATCH v5 04/11] ACPI: CPPC: Extend cppc_set_epp_perf() to support auto_sel and epp zhenglifeng (A)
2026-01-08 13:39     ` Sumit Gupta
2026-01-16 15:59   ` Pierre Gondois
2025-12-23 12:13 ` [PATCH v5 05/11] ACPI: CPPC: add APIs and sysfs interface for min/max_perf Sumit Gupta
2025-12-25  9:03   ` zhenglifeng (A)
2025-12-23 12:13 ` [PATCH v5 06/11] ACPI: CPPC: add APIs and sysfs interface for perf_limited Sumit Gupta
2025-12-25 12:06   ` zhenglifeng (A)
2026-01-08 14:38     ` Sumit Gupta
2026-01-15  8:01       ` zhenglifeng (A)
2025-12-23 12:13 ` [PATCH v5 07/11] cpufreq: CPPC: Add sysfs for min/max_perf and perf_limited Sumit Gupta
2025-12-24 18:32   ` kernel test robot
2025-12-26  0:20   ` Bagas Sanjaya
2026-01-08 14:30     ` Sumit Gupta
2025-12-23 12:13 ` [PATCH v5 08/11] cpufreq: CPPC: sync policy limits when updating min/max_perf Sumit Gupta
2025-12-25 13:56   ` zhenglifeng (A)
2026-01-08 13:53     ` Sumit Gupta
2026-01-15  8:20       ` zhenglifeng (A)
2025-12-23 12:13 ` [PATCH v5 09/11] cpufreq: CPPC: sync policy limits when toggling auto_select Sumit Gupta
2025-12-26  2:55   ` zhenglifeng (A)
2026-01-08 14:21     ` Sumit Gupta
2026-01-15  8:57       ` zhenglifeng (A)
2025-12-23 12:13 ` [PATCH v5 10/11] cpufreq: CPPC: make scaling_min/max_freq read-only when auto_sel enabled Sumit Gupta
2025-12-26  3:26   ` zhenglifeng (A)
2026-01-08 14:01     ` Sumit Gupta
2026-01-08 16:46   ` Pierre Gondois
2026-01-09 14:37     ` Sumit Gupta
2026-01-12 11:44       ` Pierre Gondois
2026-01-15 12:32         ` zhenglifeng (A)
2026-01-15 15:22           ` Sumit Gupta
2026-01-16 17:05             ` Pierre Gondois
2026-01-15 15:15         ` Sumit Gupta
2025-12-23 12:13 ` [PATCH v5 11/11] cpufreq: CPPC: add autonomous mode boot parameter support Sumit Gupta
2025-12-26  8:03   ` zhenglifeng (A)
2026-01-08 14:04     ` Sumit Gupta

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