From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F219F3FA5C9; Thu, 7 May 2026 12:56:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158565; cv=none; b=MBglVSH3H+jb8K+FJrZv9kB/a2P6Xf1tIJssnAEOHCJH1Fz+XsKjB2bTAlfBp192lJoETGz1f3ls5woC36dgLHsPdDM+DqsRWCksYBeCNBXTJHJEaLCuat43JstWfKkcefIOGQwmbcdPgMHa7ZD1SEjhGa2gkdQOWsFvfWA05y8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158565; c=relaxed/simple; bh=fkZMrW6p1fEj7FMV4QtZc65vSfeoK86dRg/bwwIVPxA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aNP/hFe6UUHgYo6XYEKHwptkfKbcR8oPPkCWaD7k2If/d/8mLVRgfa0MTz5gDfeoVandafQ9MO7qc5sj+Bs6bGF2/oQhE3V9iLXfvqnBMBamVEYbxu0aWtoObn+7sEboZJg5xsAIqzAVcup097/egccoyFLId36BmdbYtDk9GbY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=G12jMoK1; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="G12jMoK1" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7A411C2BCC4; Thu, 7 May 2026 12:56:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158564; bh=fkZMrW6p1fEj7FMV4QtZc65vSfeoK86dRg/bwwIVPxA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G12jMoK18dep+y7vRZxfUxMqrbEbQHbwgjM7fbtSooaJbrMVGFjUwMF1pVr46s9ts d6xsoVaf6yB936RzYNZ5hkcmsvVKbZNcF9ReoliQAiorsLSvbLE/jdVZ3UtzCedyqJ UxNUhHgoNLwDdu1XrO6K9gnqOuZunTmzGGD091/kjzQi+aPx3HWMeWgAUTvcNIge+V cARY1vSydyckBOc7beHXsTJiiLSIlZb/4sMo9T+CCbD8ja7ByAiG/9j66a9NoiCbv+ ExOU1PuDw7ccMn0tFiyOLwoFf6hsDEBwJ35GgMlAIrHMouYxwk5VaJFEkLRbiZnbh6 IoB7tuzcjAY0g== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGo-00000000d7d-2D0G; Thu, 07 May 2026 12:56:02 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 14/16] arm64: dts: rockchip: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:42 +0100 Message-ID: <20260507125544.2903406-15-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false The ARMv8.2 based CPUs used in a number of Rockchip SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi index 64bdd8b7754b5..a5832895bd392 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi @@ -195,7 +195,8 @@ timer { interrupts = , , , - ; + , + ; arm,no-tick-in-suspend; }; -- 2.47.3