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Wysocki" , Len Brown , James Morse , Ben Horgan , Reinette Chatre , Fenghua Yu , Jonathan Cameron , Srivathsa L Rao , Ganapatrao Kulkarni , Trilok Soni , Srinivas Ramana , Niyas Sait , linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 12/16] arm_mpam: propagate MSC write errors for remaining MSC write users Message-ID: <20260710121010.00005a45@oss.qualcomm.com> In-Reply-To: <20260710144520.917375-13-andre.przywara@arm.com> References: <20260710144520.917375-1-andre.przywara@arm.com> <20260710144520.917375-13-andre.przywara@arm.com> Organization: Qualcomm X-Mailer: Claws Mail 4.4.0 (GTK 3.24.51; x86_64-w64-mingw32) Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzEwMDE5MiBTYWx0ZWRfX6q+I9elNuymK F6I83/vB4fYk4ULc1NweHXiLjM60NpQYS2HA4PeVMX+nUjZY9d6k+mnUiRxAmMJSAKxNkHHuTKB j4VrERJprqGudg4v3I0tqlXjSy9xkgpoPNtN/UiXID1txxEZsiblHjSvjrXOOwpD/VOROriA+Vn KIADTIMM5N/aRVvTT9gzZXwSm7QLwSurkrz3KPEEcVEWx21GUaEfMzFPQFEKukztQ2mrOVX0koz RYd4V7Q77EGe49rW5P8WljlOHdBEFZTylmrWnKn5+xO7NiE048AxFwYnSjcQMEol7t1mtgrS6Co QewOX7jfU+FhzyT3MojNWjCvIvbdjHUG23Mv8OfGj5UhllIdibf1TcLEWsgtd6PYTkENJHn0WSd iBr1+PnyEZY5ytLITmTx0qbHVNcJ1PJt1sO6NOLTpKLYu1eLWd4F8lbZ6Y2Q3+T+gM34eP9S4Aq bjc6GOWDi2ziD1UyzVA== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzEwMDE5MiBTYWx0ZWRfX4jURQ1z9RjH9 JU5DJfhUOWT52ZYghxR0ZXhhlCcg4laZxPAGWW/BZkHE95kys1m3fbDowiMHQVUB1iAuR4dsWFg eHobqeYnRf40Yv6WeHcLbDZJpXgZJYE= X-Proofpoint-ORIG-GUID: V38N1LaJt4K-JChvk6gLnqBUxk-VcyX2 X-Authority-Analysis: v=2.4 cv=J9SaKgnS c=1 sm=1 tr=0 ts=6a514398 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=qC1CW/w66vtJz1P9yTJxNA==:17 a=kj9zAlcOel0A:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=7CQSdrXTAAAA:8 a=QUh50r0uCS2WbTzk5IMA:9 a=CjuIK1q_8ugA:10 a=x9snwWr2DeNwDh03kgHS:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-GUID: V38N1LaJt4K-JChvk6gLnqBUxk-VcyX2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-10_05,2026-07-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 malwarescore=0 spamscore=0 adultscore=0 clxscore=1015 suspectscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607100192 On Fri, 10 Jul 2026 16:45:16 +0200 Andre Przywara wrote: > Allow the remaining MSC device functions to return an error, and > propagate write errors from the lower level up. > > Signed-off-by: Andre Przywara > > propagate write errors up for mpam_save_mbwu_state() below the sign off? > --- > drivers/resctrl/mpam_devices.c | 82 +++++++++++++++++++++++----------- > 1 file changed, 56 insertions(+), 26 deletions(-) > > diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c > index 222515a01b35..ca73029654b6 100644 > --- a/drivers/resctrl/mpam_devices.c > +++ b/drivers/resctrl/mpam_devices.c > @@ -1162,15 +1162,20 @@ static int mpam_msc_read_mbwu_l(struct mpam_msc *msc, u64 *res) > return ret; > } > > -static void mpam_msc_zero_mbwu_l(struct mpam_msc *msc) > +static int mpam_msc_zero_mbwu_l(struct mpam_msc *msc) > { > + int ret; > + > mpam_mon_sel_lock_held(msc); > > WARN_ON_ONCE((MSMON_MBWU_L + sizeof(u64)) > msc->mapped_hwpage_sz); > WARN_ON_ONCE(!cpumask_test_cpu(smp_processor_id(), &msc->accessibility)); > > - __mpam_write_reg(msc, MSMON_MBWU_L, 0); > - __mpam_write_reg(msc, MSMON_MBWU_L + 4, 0); > + ret = __mpam_write_reg(msc, MSMON_MBWU_L, 0); > + if (!ret) > + ret = __mpam_write_reg(msc, MSMON_MBWU_L + 4, 0); Code lines are cheap. Burn them for simple flow. ret = __mpam_write_reg(msc, MSMON_MBWU_L, 0); if (ret) return ret; return __mpam_write_reg(msc, MSMON_MBWU_L + 4, 0); > + > + return ret; > } > > static void gen_msmon_ctl_flt_vals(struct mon_read *m, u32 *ctl_val, > +static int write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val, > + u32 flt_val) > { > struct mpam_msc *msc = m->ris->vmsc->msc; > + int ret; > > /* > * Write the ctl_val with the enable bit cleared, reset the counter, > @@ -1260,26 +1266,37 @@ static void write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val, > */ > switch (m->type) { > case mpam_feat_msmon_csu: > - mpam_write_monsel_reg(msc, CFG_CSU_FLT, flt_val); > - mpam_write_monsel_reg(msc, CFG_CSU_CTL, ctl_val); > - mpam_write_monsel_reg(msc, CSU, 0); > - mpam_write_monsel_reg(msc, CFG_CSU_CTL, ctl_val | MSMON_CFG_x_CTL_EN); > + ret = mpam_write_monsel_reg(msc, CFG_CSU_FLT, flt_val); > + if (!ret) > + ret = mpam_write_monsel_reg(msc, CFG_CSU_CTL, ctl_val); > + if (!ret) > + ret = mpam_write_monsel_reg(msc, CSU, 0); > + if (!ret) > + ret = mpam_write_monsel_reg(msc, CFG_CSU_CTL, ctl_val | MSMON_CFG_x_CTL_EN); By now you can probably guess my comments on this. If you ever find yourself with a case where you can't do guard/ acquire()/early returns etc, use a helper function that can just return on each err. It is more code, but I'd much rather see that on error we 'stop' and return than try and follow the path to see if anything else happens. ret = a(); if (ret) return ret; ret = b(); if (ret) return ret; etc.