From: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
To: Andre Przywara <andre.przywara@arm.com>
Cc: Lorenzo Pieralisi <lpieralisi@kernel.org>,
Hanjun Guo <guohanjun@huawei.com>,
Sudeep Holla <sudeep.holla@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>, James Morse <james.morse@arm.com>,
Ben Horgan <ben.horgan@arm.com>,
Reinette Chatre <reinette.chatre@intel.com>,
Fenghua Yu <fenghuay@nvidia.com>,
Jonathan Cameron <jic23@kernel.org>,
Srivathsa L Rao <srivathsa.rao@oss.qualcomm.com>,
Ganapatrao Kulkarni <ganapatrao.kulkarni@oss.qualcomm.com>,
Trilok Soni <tsoni@quicinc.com>,
Srinivas Ramana <sramana@qti.qualcomm.com>,
Niyas Sait <niyas.sait@arm.com>, Lee Trager <lee@trager.us>,
Ritwick Sharma <ritwick.sharma@arm.com>,
linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 09/10] arm_mpam: change MPAM-Fb error IRQ to use a threaded IRQ handler
Date: Thu, 30 Jul 2026 12:13:36 -0700 [thread overview]
Message-ID: <20260730121336.00002130@oss.qualcomm.com> (raw)
In-Reply-To: <20260730152539.2712312-10-andre.przywara@arm.com>
On Thu, 30 Jul 2026 17:25:38 +0200
Andre Przywara <andre.przywara@arm.com> wrote:
> When an MPAM MSC gets into an error condition, it can trigger an error
> IRQ. We cannot really do much about those errors, but we at least query
> and log the error, then disable MPAM functionality.
>
> This error report relies on reading the MSC's error status register
> (ESR) in the current hard-IRQ handler, which is not possible for MPAM-Fb
> based MSC accesses, since they involve mailbox routines that might sleep.
> The same is true for clearing the interrupt at the source, which requires
> an MSC access as well.
>
> When an MSC is using MPAM-Fb, change the error IRQ to use a threaded IRQ
> handler, with an empty hard IRQ routine, and doing all the MSC accesses
> (to access the status and disable the IRQ line) in the threaded part.
> The change is minimal, we just check for the first MSC access error and
> bail out early. MMIO based MSCs keep using a hard-IRQ handler, since
> they must be at least non-migrate-able when doing MSC accesses, for the
> CPU affinity check to work.
> Also forbid per-CPU interrupts (PPIs) for MPAM-Fb, as we cannot use a
> threaded IRQ here.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
One thing below.
> ---
> drivers/resctrl/mpam_devices.c | 64 ++++++++++++++++++++++++++--------
> 1 file changed, 49 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
> index daaf3cf48475..606ae4af2be9 100644
> --- a/drivers/resctrl/mpam_devices.c
> +++ b/drivers/resctrl/mpam_devices.c
> @@ -2747,9 +2766,24 @@ static int mpam_register_irqs(void)
> &_enable_percpu_irq, &irq,
> true);
> } else {
> - err = devm_request_irq(&msc->pdev->dev, irq,
> - &mpam_spi_handler, IRQF_SHARED,
> - "mpam:msc:error", msc);
> + irq_handler_t hard, threaded;
> +
> + /*
> + * MPAM-Fb needs a sleepable context for the MSC
> + * accesses, whereas MMIO requires at least a
> + * non-migrateable context for the processor ID check.
> + */
> + if (msc->iface == MPAM_IFACE_MMIO) {
> + hard = &mpam_spi_handler;
> + threaded = NULL;
> + } else {
> + hard = NULL;
> + threaded = &mpam_spi_handler;
> + }
> + err = devm_request_threaded_irq(&msc->pdev->dev, irq,
> + hard, threaded,
> + IRQF_SHARED | IRQF_ONESHOT,
IIRC correctly you'll trip a warning message for the case of MMIO and marking
it as IRQF_ONESHOT. See __setup_irq()
That was a fairly recent check to be added and caused all sorts of problems
with cases similar to this one where the handlers are coming from variables.
Upshot, you need to call appropriate registration function.
Jonathan
> + "mpam:msc:error", msc);
> if (err)
> return err;
> }
next prev parent reply other threads:[~2026-07-30 19:13 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-30 15:25 [PATCH v6 00/10] arm_mpam: Add MPAM-Fb firmware support Andre Przywara
2026-07-30 15:25 ` [PATCH v6 01/10] arm_mpam: let low level MSC accessors return an error Andre Przywara
2026-07-30 15:25 ` [PATCH v6 02/10] arm_mpam: propagate MSC access errors for hw_probe functions Andre Przywara
2026-07-30 15:25 ` [PATCH v6 03/10] arm_mpam: propagate MSC access errors for MBWU counters Andre Przywara
2026-07-30 15:25 ` [PATCH v6 04/10] arm_mpam: propagate MSC access errors for msmon helpers Andre Przywara
2026-07-30 15:25 ` [PATCH v6 05/10] arm_mpam: propagate MSC access errors for __ris_msmon_read() Andre Przywara
2026-07-30 15:25 ` [PATCH v6 06/10] arm_mpam: propagate MSC access errors for state saving function Andre Przywara
2026-07-30 15:25 ` [PATCH v6 07/10] arm_mpam: prepare mon_sel locking for MPAM-Fb Andre Przywara
2026-07-30 18:37 ` Jonathan Cameron
2026-07-30 21:46 ` Lee Trager
2026-07-30 15:25 ` [PATCH v6 08/10] arm_mpam: add MPAM-Fb MSC firmware access support Andre Przywara
2026-07-30 19:05 ` Jonathan Cameron
2026-07-30 15:25 ` [PATCH v6 09/10] arm_mpam: change MPAM-Fb error IRQ to use a threaded IRQ handler Andre Przywara
2026-07-30 19:13 ` Jonathan Cameron [this message]
2026-07-30 15:25 ` [PATCH v6 10/10] arm_mpam: detect and enable MPAM-Fb PCC support Andre Przywara
2026-07-30 16:13 ` Ben Horgan
2026-07-30 19:17 ` Jonathan Cameron
2026-07-30 22:28 ` Lee Trager
2026-07-30 17:10 ` [PATCH v6 00/10] arm_mpam: Add MPAM-Fb firmware support Ben Horgan
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