From: Terry Bowman <terry.bowman@amd.com>
To: Jonathan Cameron <jic23@kernel.org>,
Dave Jiang <dave.jiang@intel.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Jonathan Corbet <corbet@lwn.net>, <linux-cxl@vger.kernel.org>
Cc: Tony Luck <tony.luck@intel.com>, Borislav Petkov <bp@alien8.de>,
"Hanjun Guo" <guohanjun@huawei.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
"Shuai Xue" <xueshuai@linux.alibaba.com>,
Len Brown <lenb@kernel.org>, Ira Weiny <iweiny@kernel.org>,
Li Ming <ming.li@zohomail.com>,
Shuah Khan <skhan@linuxfoundation.org>,
Ben Cheatham <Benjamin.Cheatham@amd.com>,
Richard Cheng <icheng@nvidia.com>,
Robert Richter <rrichter@amd.com>, <linux-pci@vger.kernel.org>,
<linux-acpi@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v19 08/14] cxl/ras: Handle RCH correctable and uncorrectable errors in one pass
Date: Mon, 3 Aug 2026 17:18:04 -0500 [thread overview]
Message-ID: <20260803221810.3685703-9-terry.bowman@amd.com> (raw)
In-Reply-To: <20260803221810.3685703-1-terry.bowman@amd.com>
cxl_rch_get_aer_info() reads and clears both the correctable and
uncorrectable AER status registers in a single pass. The previous
severity decode returned after the first matching class, so when a
correctable and an uncorrectable error were logged simultaneously the
correctable event was cleared in hardware but never traced or handled.
Handle both classes independently: dispatch cxl_handle_cor_ras() when
correctable status is set and cxl_do_recovery() when uncorrectable
status is set. Remove the now-unused cxl_rch_get_aer_severity() helper
and decode the uncorrectable severity inline.
Reported-by: Sashiko <sashiko@linuxfoundation.org>
Signed-off-by: Terry Bowman <terry.bowman@amd.com>
---
Changes in v18 -> v19:
- New patch to process correctable and uncorrectable RCH errors in the
same call so a co-logged correctable event is not lost.
---
drivers/cxl/core/ras_rch.c | 42 ++++++++++++++------------------------
1 file changed, 15 insertions(+), 27 deletions(-)
diff --git a/drivers/cxl/core/ras_rch.c b/drivers/cxl/core/ras_rch.c
index 41959c0333711..6f95542e2e6a7 100644
--- a/drivers/cxl/core/ras_rch.c
+++ b/drivers/cxl/core/ras_rch.c
@@ -89,31 +89,10 @@ static bool cxl_rch_get_aer_info(void __iomem *aer_base,
return true;
}
-/* Get AER severity. Return false if there is no error. */
-static bool cxl_rch_get_aer_severity(struct aer_capability_regs *aer_regs,
- int *severity)
-{
- u32 uncor_status = aer_regs->uncor_status & ~aer_regs->uncor_mask;
-
- if (uncor_status) {
- *severity = (uncor_status & aer_regs->uncor_severity) ?
- AER_FATAL : AER_NONFATAL;
- return true;
- }
-
- if (aer_regs->cor_status & ~aer_regs->cor_mask) {
- *severity = AER_CORRECTABLE;
- return true;
- }
-
- return false;
-}
-
void cxl_handle_rdport_errors(struct pci_dev *pdev)
{
struct aer_capability_regs aer_regs;
struct cxl_dport *dport;
- int severity;
struct cxl_port *port __free(put_cxl_port) = cxl_pci_find_port(pdev, NULL);
if (!port)
@@ -127,12 +106,21 @@ void cxl_handle_rdport_errors(struct pci_dev *pdev)
if (!cxl_rch_get_aer_info(dport->regs.dport_aer, &aer_regs))
return;
- if (!cxl_rch_get_aer_severity(&aer_regs, &severity))
- return;
+ /*
+ * Handle correctable and uncorrectable errors independently; both
+ * may be set in the same pass and cxl_rch_get_aer_info() has already
+ * cleared both status registers.
+ */
+ if (aer_regs.cor_status & ~aer_regs.cor_mask) {
+ pci_print_aer(pdev, AER_CORRECTABLE, &aer_regs);
+ cxl_handle_cor_ras(dport->dport_dev, to_ras_base(port, dport));
+ }
+
+ if (aer_regs.uncor_status & ~aer_regs.uncor_mask) {
+ int severity = (aer_regs.uncor_status & aer_regs.uncor_severity) ?
+ AER_FATAL : AER_NONFATAL;
- pci_print_aer(pdev, severity, &aer_regs);
- if (severity == AER_CORRECTABLE)
- cxl_handle_cor_ras(&pdev->dev, to_ras_base(port, dport));
- else
+ pci_print_aer(pdev, severity, &aer_regs);
cxl_do_recovery(pdev, dport->port, dport);
+ }
}
--
2.34.1
next prev parent reply other threads:[~2026-08-03 22:19 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-03 22:17 [PATCH v19 00/14] Enable CXL PCIe Port Protocol Error handling and logging Terry Bowman
2026-08-03 22:17 ` [PATCH v19 01/14] cxl/ras: Fix cxl_rch_get_aer_info() out-of-bounds AER register read Terry Bowman
2026-08-04 2:10 ` Alison Schofield
2026-08-03 22:17 ` [PATCH v19 02/14] cxl/ras: Fix cxl_rch_get_aer_severity() wrong severity register Terry Bowman
2026-08-04 2:11 ` Alison Schofield
2026-08-03 22:17 ` [PATCH v19 03/14] acpi/apei/ghes: Use raw_spinlock_t for CXL CPER work locks Terry Bowman
2026-08-03 22:18 ` [PATCH v19 04/14] cxl: Tighten CPER kfifo registration API and symbol visibility Terry Bowman
2026-08-04 2:13 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 05/14] cxl: Rename find_cxl_port() to find_cxl_port_by_dport() Terry Bowman
2026-08-04 2:14 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 06/14] PCI/AER: Introduce AER-CXL protocol error kfifo Terry Bowman
2026-08-03 22:18 ` [PATCH v19 07/14] PCI: Establish common CXL Port protocol error flow Terry Bowman
2026-08-03 22:18 ` Terry Bowman [this message]
2026-08-04 2:16 ` [PATCH v19 08/14] cxl/ras: Handle RCH correctable and uncorrectable errors in one pass Alison Schofield
2026-08-03 22:18 ` [PATCH v19 09/14] cxl/pci: Thread port and dport through RAS handling helpers Terry Bowman
2026-08-04 2:16 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 10/14] cxl: Update CXL Endpoint AER handler Terry Bowman
2026-08-04 2:17 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 11/14] PCI: Cache PCI DSN into pci_dev->dsn during probe Terry Bowman
2026-08-04 2:26 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 12/14] cxl: Add port and dport identifiers to CXL AER trace events Terry Bowman
2026-08-04 2:27 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 13/14] PCI/CXL: Mask/Unmask CXL protocol errors Terry Bowman
2026-08-04 2:29 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 14/14] Documentation: cxl: Document CXL protocol error handling Terry Bowman
2026-08-04 2:30 ` Alison Schofield
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