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From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <linux-pci@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
	<linux-edac@vger.kernel.org>, <bhelgaas@google.com>,
	Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v2 08/10] PCI/FLIT: Add trace event for flit errors
Date: Fri, 18 Sep 2026 09:56:16 -0500	[thread overview]
Message-ID: <20260918145619.3016889-9-yazen.ghannam@amd.com> (raw)
In-Reply-To: <20260918145619.3016889-1-yazen.ghannam@amd.com>

Emit a trace event for each flit error logged from the Flit Error Log.
The event carries both Error Log registers.

Assisted-by: LLM
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
 drivers/pci/pcie/flit.c |  3 +++
 include/ras/ras_event.h | 38 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 41 insertions(+)

diff --git a/drivers/pci/pcie/flit.c b/drivers/pci/pcie/flit.c
index 7c0b9c8dd481..9eb804035997 100644
--- a/drivers/pci/pcie/flit.c
+++ b/drivers/pci/pcie/flit.c
@@ -18,6 +18,7 @@
 #include <linux/pci.h>
 #include <linux/slab.h>
 #include <linux/spinlock.h>
+#include <ras/ras_event.h>
 #include "portdrv.h"
 #include "../pci.h"
 
@@ -205,6 +206,8 @@ static void flit_report(struct pci_dev *pdev, u32 err_log1, u32 err_log2)
 		return;
 
 	pci_warn(pdev, "ErrLog1: 0x%08x ErrLog2: 0x%08x\n", err_log1, err_log2);
+
+	trace_flit_event(pci_name(pdev), err_log1, err_log2);
 }
 
 static irqreturn_t flit_ist(int irq, void *context)
diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h
index fdb785fa4613..427585505dd6 100644
--- a/include/ras/ras_event.h
+++ b/include/ras/ras_event.h
@@ -381,6 +381,44 @@ TRACE_EVENT(aer_event,
 			"Not available")
 );
 #endif /* CONFIG_PCIEAER */
+
+/*
+ * PCIe Flit Logging trace event
+ *
+ * One event is generated for each flit error the driver logs from the Flit
+ * Error Log of a PCIe Flit Mode port.
+ *
+ * char * dev_name -	The name of the slot where the device resides
+ *			([domain:]bus:device.function).
+ * u32 err_log1 -	Flit Error Log 1 register value.
+ * u32 err_log2 -	Flit Error Log 2 register value.
+ */
+#ifdef CONFIG_PCIE_FLIT
+TRACE_EVENT(flit_event,
+	TP_PROTO(const char *dev_name,
+		 const u32 err_log1,
+		 const u32 err_log2),
+
+	TP_ARGS(dev_name, err_log1, err_log2),
+
+	TP_STRUCT__entry(
+		__string(	dev_name,	dev_name	)
+		__field(	u32,		err_log1	)
+		__field(	u32,		err_log2	)
+	),
+
+	TP_fast_assign(
+		__assign_str(dev_name);
+		__entry->err_log1	= err_log1;
+		__entry->err_log2	= err_log2;
+	),
+
+	TP_printk("%s err_log1:0x%08x err_log2:0x%08x",
+		__get_str(dev_name),
+		__entry->err_log1,
+		__entry->err_log2)
+);
+#endif /* CONFIG_PCIE_FLIT */
 #endif /* _TRACE_HW_EVENT_MC_H */
 
 /* This part must be outside protection */
-- 
2.43.0


  parent reply	other threads:[~2026-09-18 14:57 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-18 14:56 [PATCH v2 00/10] PCIe Flit Logging Ext Capability Support Yazen Ghannam
2026-09-18 14:56 ` [PATCH v2 01/10] MAINTAINERS: Add the AER sysfs ABI file to PCI SUBSYSTEM Yazen Ghannam
2026-09-18 14:56 ` [PATCH v2 02/10] PCI/AER: Clamp negative ratelimit burst to zero Yazen Ghannam
2026-09-18 14:56 ` [PATCH v2 03/10] PCI/AER: Report the ratelimit interval in milliseconds Yazen Ghannam
2026-09-18 14:56 ` [PATCH v2 04/10] PCI/AER: Hide the "aer" sysfs directory when AER is unavailable Yazen Ghannam
2026-09-18 14:56 ` [PATCH v2 05/10] PCI: Share the AER ratelimit sysfs accessors Yazen Ghannam
2026-09-18 14:56 ` [PATCH v2 06/10] PCI/portdrv: Group PCI Exp Cap services into a single mask Yazen Ghannam
2026-09-18 14:56 ` [PATCH v2 07/10] PCI/FLIT: Add support for Flit Logging Extended Capability Yazen Ghannam
2026-09-18 16:38   ` Ilpo Järvinen
2026-09-18 14:56 ` Yazen Ghannam [this message]
2026-09-18 14:56 ` [PATCH v2 09/10] PCI/FLIT: Ratelimit flit error logging Yazen Ghannam
2026-09-18 14:56 ` [PATCH v2 10/10] PCI/FLIT: Expose the error counter controls through sysfs Yazen Ghannam

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