From: Nathan Bryant <nbryant-p32f3XyCuykqcZcGjlUOXw@public.gmane.org>
To: "Grover, Andrew" <andrew.grover-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Cc: Paul Ionescu <i_p_a_u_l-/E1597aS9LQAvxtiuMwx3w@public.gmane.org>,
acpi-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
Subject: Re: IBM T41 + ACPI + APIC
Date: Thu, 12 Aug 2004 13:00:50 -0400 [thread overview]
Message-ID: <411BA242.6010103@optonline.net> (raw)
In-Reply-To: <F760B14C9561B941B89469F59BA3A8470726A996-sBd4vmA9Se6krb+BlOpmy7fspsVTdybXVpNB7YpNyf8@public.gmane.org>
Grover, Andrew wrote:
> You need an IOAPIC. The local APIC is basically just the part of the CPU
> that receives messages from the IOAPIC, if present.
By the way, it is a bad idea to use front-side-bus interrupt delivery on
some (all?) Intel mobile processors/chipsets. This prevents entering C3,
if I remember correctly. The real details are in the i850-M databook...
Does turning on IOAPIC+local APIC enable FSB-interrupt mode in Linux?
What about also turning on message-signalled interrupts? Seems we use
the local-apic instead of the IO(x)APIC for MSI.
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next prev parent reply other threads:[~2004-08-12 17:00 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-08-12 16:50 IBM T41 + ACPI + APIC Grover, Andrew
[not found] ` <F760B14C9561B941B89469F59BA3A8470726A996-sBd4vmA9Se6krb+BlOpmy7fspsVTdybXVpNB7YpNyf8@public.gmane.org>
2004-08-12 17:00 ` Nathan Bryant [this message]
[not found] ` <411BA242.6010103-p32f3XyCuykqcZcGjlUOXw@public.gmane.org>
2004-08-12 19:56 ` Frank Mehnert
-- strict thread matches above, loose matches on Subject: below --
2004-08-12 12:02 Paul Ionescu
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