From mboxrd@z Thu Jan 1 00:00:00 1970 From: Nathan Bryant Subject: Re: IBM T41 + ACPI + APIC Date: Thu, 12 Aug 2004 13:00:50 -0400 Sender: acpi-devel-admin-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Message-ID: <411BA242.6010103@optonline.net> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Errors-To: acpi-devel-admin-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , List-Archive: To: "Grover, Andrew" Cc: Paul Ionescu , acpi-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: linux-acpi@vger.kernel.org Grover, Andrew wrote: > You need an IOAPIC. The local APIC is basically just the part of the CPU > that receives messages from the IOAPIC, if present. By the way, it is a bad idea to use front-side-bus interrupt delivery on some (all?) Intel mobile processors/chipsets. This prevents entering C3, if I remember correctly. The real details are in the i850-M databook... Does turning on IOAPIC+local APIC enable FSB-interrupt mode in Linux? What about also turning on message-signalled interrupts? Seems we use the local-apic instead of the IO(x)APIC for MSI. ------------------------------------------------------- SF.Net email is sponsored by Shop4tech.com-Lowest price on Blank Media 100pk Sonic DVD-R 4x for only $29 -100pk Sonic DVD+R for only $33 Save 50% off Retail on Ink & Toner - Free Shipping and Free Gift. http://www.shop4tech.com/z/Inkjet_Cartridges/9_108_r285