bus master activity must be polled?

bus master activity must be polled?

[Thomas Renninger]

Hi,

I searched the APCI spec up and down, but couldn't find
anything where bus master activity can be read out
through interrupts?

Even something is listed under Fixed ACPI Events as bus master request,
what sounds like some kind of notification through hardware (p.137, spec 3.0),
I think it is not possible to get notified?

Is this right, that bm_sts always needs to be polled, then?
If I understand things right, this is how it is (must be?) done:

  - check bm_sts bit on every idle() call
  - if bm_sts bit is set wait at least xy ms (32 ms (100Hz), 40 ms (1000Hz))
    before triggering deeper sleeping states (C3, ...).
  - this is because bm_sts bit will be set when a bus master transaction
    started. When it is stopped cannot be detected, therefore it is assumed (cannot not
    be assured?) that the transaction finished after at least 30 ms. If bm_sts
    is not set again -> no bm activity -> trigger C3 or deeper states.


Playing around a bit with C-states I recognised that bm activity appears to
be set quite often.
If there would be the possibility of a notification if all bm transactions finished,
the efficiency of C-states could probably increased significantly (e.g. a realistic
average of bm activity appearing on my machine is ~100ms, waiting 40ms means the machine can be in
deeper sleeping states not more than 60% of total time, even if idle).
Maybe there are other ways to detect bus master activity than using ACPI interface?

Could somebody confirm whether this is right or whether I am wrong in some points, please?
Does somebody have any idea how this could be tweaked?

Thanks,

     Thomas


-------------------------------------------------------
This SF.Net email is sponsored by: NEC IT Guy Games.
Get your fingers limbered up and give it your best shot. 4 great events, 4
opportunities to win big! Highest score wins.NEC IT Guy Games. Play to
win an NEC 61 plasma display. Visit http://www.necitguy.com/?r=20

Re: bus master activity must be polled?

[Dominik Brodowski]

Hi,


Reading the ICH4-M spec from intel (doc 252337 rev. 01), p. 371 actually
increases the confusion, so I tested it:

a) is the bit _only_ set if the CPU was in C3 and got awakened from there?

ANSWER: No. Even if only C2 is used, this bit is updated.

b) will the bit stay at "1" even if there is no bus master activity going
   on any longer?

ANSWER: Yes. It needs to be re-set by echo'ing "1".

c) if the bus master activity is only continuing (i.e. the transaction just
   hasn't finished yet), is the bus master status set to zero?

ANSWER: No. 

                if (bm_status) {
                        pr->power.bm_activity++;
                        acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS,
                                1, ACPI_MTX_DO_NOT_LOCK);
                        /* instant re-check */
                        acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS,
                        &bm_status, ACPI_MTX_DO_NOT_LOCK);
                        if (bm_status)
                                bm_activity2++;
                }

showed that bm_activity2 was always (almost) equal to bm_activity, at least 
when I looked ;)

What does this mean?


On Tue, May 03, 2005 at 02:08:43PM +0200, Thomas Renninger wrote:
>   - this is because bm_sts bit will be set when a bus master transaction
>     started.
No, also when it hasn't finished yet.


I think bm_status should influence how long we disable the idle tick, not
the other way round:

check bm_status
	-> if it is not set, and the other requirements are fulfilled,
		go to C3 or higher
	-> if it is set => only C2, don't sleep for longer than, lets say, 
		10 ms.

	alternatively:
	-> if it is set => only C2, don't sleep for longer than 1 ms, then
	   re-check; if bus mastering is gone and CPU load and bus master
	   load is low (some mask-based "weight", possibly?)
		for (i=0; i<32; i++) {
			weight += (bm_status & (0x1 << i)) * (33 - i);
		}
	   then enter C3 or higher for possibly longer time.

I think we can be more aggressive in entering higher idle states if
bm_status _was_ present but is no more.

Opinions? Ideas? Test results on non-Intel CPUs/chipsets?

	Dominik


-------------------------------------------------------
This SF.Net email is sponsored by: NEC IT Guy Games.
Get your fingers limbered up and give it your best shot. 4 great events, 4
opportunities to win big! Highest score wins.NEC IT Guy Games. Play to
win an NEC 61 plasma display. Visit http://www.necitguy.com/?r=20