From: Robin Murphy <robin.murphy@arm.com>
To: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>,
lorenzo.pieralisi@arm.com, will.deacon@arm.com,
marc.zyngier@arm.com, joro@8bytes.org
Cc: john.garry@huawei.com, xuwei5@hisilicon.com,
guohanjun@huawei.com, iommu@lists.linux-foundation.org,
linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
devicetree@vger.kernel.org, linuxarm@huawei.com
Subject: Re: [PATCH v10 2/3] iommu/dma: Add HW MSI(GICv3 ITS) address regions reservation
Date: Mon, 11 Dec 2017 14:54:12 +0000 [thread overview]
Message-ID: <431dd431-1c22-32aa-b3a0-2fd5d4a7ec11@arm.com> (raw)
In-Reply-To: <20171129141449.120316-3-shameerali.kolothum.thodi@huawei.com>
On 29/11/17 14:14, Shameer Kolothum wrote:
> Modified iommu_dma_get_resv_regions() to include GICv3 ITS
> region on ACPI based ARM platfiorms which may require HW MSI
> reservations.
Assuming this builds correctly for all the various combinations of
CONFIG_ACPI and CONFIG_ACPI_IORT,
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> ---
> drivers/iommu/dma-iommu.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c
> index 25914d3..f05f3cf 100644
> --- a/drivers/iommu/dma-iommu.c
> +++ b/drivers/iommu/dma-iommu.c
> @@ -19,6 +19,7 @@
> * along with this program. If not, see <http://www.gnu.org/licenses/>.
> */
>
> +#include <linux/acpi_iort.h>
> #include <linux/device.h>
> #include <linux/dma-iommu.h>
> #include <linux/gfp.h>
> @@ -167,13 +168,18 @@ void iommu_put_dma_cookie(struct iommu_domain *domain)
> *
> * IOMMU drivers can use this to implement their .get_resv_regions callback
> * for general non-IOMMU-specific reservations. Currently, this covers host
> - * bridge windows for PCI devices.
> + * bridge windows for PCI devices and GICv3 ITS region reservation on ACPI
> + * based ARM platforms that may require HW MSI reservation.
> */
> void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list)
> {
> struct pci_host_bridge *bridge;
> struct resource_entry *window;
>
> + if (!is_of_node(dev->iommu_fwspec->iommu_fwnode) &&
> + iort_iommu_msi_get_resv_regions(dev, list) < 0)
> + return;
> +
> if (!dev_is_pci(dev))
> return;
>
>
next prev parent reply other threads:[~2017-12-11 14:54 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-29 14:14 [PATCH v10 0/3] iommu/smmu-v3: Workaround for hisilicon 161010801 erratum(reserve HW MSI) Shameer Kolothum
[not found] ` <20171129141449.120316-1-shameerali.kolothum.thodi-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-11-29 14:14 ` [PATCH v10 1/3] ACPI/IORT: Add msi address regions reservation helper Shameer Kolothum
[not found] ` <20171129141449.120316-2-shameerali.kolothum.thodi-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-12-11 14:45 ` Lorenzo Pieralisi
2017-12-12 11:51 ` Shameerali Kolothum Thodi
2017-11-29 14:14 ` [PATCH v10 2/3] iommu/dma: Add HW MSI(GICv3 ITS) address regions reservation Shameer Kolothum
2017-12-11 14:54 ` Robin Murphy [this message]
2017-11-29 14:14 ` [PATCH v10 3/3] arm64:dts:hisilicon Disable hisilicon smmu node on hip06/hip07 Shameer Kolothum
2017-12-11 9:17 ` [PATCH v10 0/3] iommu/smmu-v3: Workaround for hisilicon 161010801 erratum(reserve HW MSI) Shameerali Kolothum Thodi
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