From: Robin Murphy <robin.murphy@arm.com>
To: shameer <shameerali.kolothum.thodi@huawei.com>,
will.deacon@arm.com, mark.rutland@arm.com,
lorenzo.pieralisi@arm.com, hanjun.guo@linaro.org
Cc: gabriele.paoloni@huawei.com, john.garry@huawei.com,
iommu@lists.linux-foundation.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
devel@acpica.org, linuxarm@huawei.com, wangzhou1@hisilicon.com,
guohanjun@huawei.com
Subject: Re: [RFC v1 2/7] iommu/arm-smmu-v3: Add erratum framework functions
Date: Tue, 16 May 2017 14:08:00 +0100 [thread overview]
Message-ID: <44374533-c1ed-5f13-d70c-8a7431bf8451@arm.com> (raw)
In-Reply-To: <20170513094731.3676-3-shameerali.kolothum.thodi@huawei.com>
On 13/05/17 10:47, shameer wrote:
> This will provide a way to replace the existing skip_prefetch_cmd
> erratum using the new framework.
Yikes, between this and patch 1 we're already pushing 70 lines of new
code, and it still doesn't actually do anything yet. Implementing the
SMMUv3 equivalent of SMMUv2's acpi_smmu_get_data() would probably be
about 10 lines; all you need to do is set some quirk flags based on a
compatible value. These quirks aren't really any different in principle
to the firmware COHACC overrides that we already process.
Sorry, I'm saying no to a massively overengineered "framework" for
something so relatively simple.
Robin.
> Signed-off-by: shameer <shameerali.kolothum.thodi@huawei.com>
> ---
> drivers/iommu/arm-smmu-v3.c | 58 +++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 58 insertions(+)
>
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index a166590..f20d5d5 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -664,16 +664,72 @@ enum smmu_erratum_match_type {
> se_match_dt,
> };
>
> +void erratum_skip_prefetch_cmd(struct arm_smmu_device *smmu, void *arg)
> +{
> + smmu->options |= ARM_SMMU_OPT_SKIP_PREFETCH;
> +}
> +
> struct smmu_erratum_workaround {
> enum smmu_erratum_match_type match_type;
> const void *id; /* Indicate the Erratum ID */
> const char *desc_str;
> + void (*enable)(struct arm_smmu_device *, void *);
> };
>
> static const struct smmu_erratum_workaround smmu_workarounds[] = {
>
> };
>
> +typedef bool (*se_match_fn_t)(const struct smmu_erratum_workaround *,
> + const void *);
> +static
> +bool smmu_check_dt_erratum(const struct smmu_erratum_workaround *wa,
> + const void *arg)
> +{
> + const struct device_node *np = arg;
> +
> + return of_property_read_bool(np, wa->id);
> +}
> +
> +static void smmu_enable_errata(struct arm_smmu_device *smmu,
> + enum smmu_erratum_match_type type,
> + se_match_fn_t match_fn,
> + void *arg)
> +{
> + const struct smmu_erratum_workaround *wa = smmu_workarounds;
> +
> + for (; wa->desc_str; wa++) {
> + if (wa->match_type != type)
> + continue;
> +
> + if (match_fn(wa, arg)) {
> + if (wa->enable) {
> + wa->enable(smmu, arg);
> + dev_info(smmu->dev,
> + "Enabling workaround for %s\n",
> + wa->desc_str);
> + }
> + }
> + }
> +}
> +
> +
> +static void smmu_check_workarounds(struct arm_smmu_device *smmu,
> + enum smmu_erratum_match_type type,
> + void *arg)
> +{
> + se_match_fn_t match_fn = NULL;
> +
> + switch (type) {
> + case se_match_dt:
> + match_fn = smmu_check_dt_erratum;
> + break;
> + }
> +
> + smmu_enable_errata(smmu, type, match_fn, arg);
> +
> +}
> +
> static struct arm_smmu_domain *to_smmu_domain(struct iommu_domain *dom)
> {
> return container_of(dom, struct arm_smmu_domain, domain);
> @@ -2641,6 +2697,8 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev,
>
> parse_driver_options(smmu);
>
> + smmu_check_workarounds(smmu, se_match_dt, dev->of_node);
> +
> if (of_dma_is_coherent(dev->of_node))
> smmu->features |= ARM_SMMU_FEAT_COHERENCY;
>
>
next prev parent reply other threads:[~2017-05-16 13:08 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-13 9:47 [RFC v1 0/7] iommu/smmu-v3: Workaround for hisilicon 161010801 erratum(reserve HW MSI) shameer
2017-05-13 9:47 ` [RFC v1 1/7] iommu/arm-smmu-v3: Add erratum framework structures shameer
[not found] ` <20170513094731.3676-1-shameerali.kolothum.thodi-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-05-13 9:47 ` [RFC v1 2/7] iommu/arm-smmu-v3: Add erratum framework functions shameer
2017-05-16 13:08 ` Robin Murphy [this message]
2017-05-16 13:45 ` Shameerali Kolothum Thodi
2017-05-13 9:47 ` [RFC v1 6/7] iommu/arm-smmu-v3: Rearrange msi resv alloc functions shameer
2017-05-16 13:27 ` Robin Murphy
[not found] ` <d2d90929-6e79-70a3-5c82-a25e67931b4a-5wv7dgnIgG8@public.gmane.org>
2017-05-16 13:54 ` Shameerali Kolothum Thodi
2017-05-13 9:47 ` [RFC v1 3/7] iommu/arm-smmu-v3: Replace the device tree binding for hisilicon broken prefetch cmd with erratum id shameer
2017-05-15 15:23 ` Rob Herring
2017-05-16 10:15 ` Shameerali Kolothum Thodi
2017-05-13 9:47 ` [RFC v1 4/7] iommu/arm-smmu-v3: Enable HiSilicon erratum 161010701 shameer
2017-05-16 13:13 ` Robin Murphy
[not found] ` <6d290334-cb68-5b20-a969-0cc6010922d5-5wv7dgnIgG8@public.gmane.org>
2017-05-16 13:46 ` Shameerali Kolothum Thodi
2017-05-13 9:47 ` [RFC v1 5/7] iommu/arm-smmu-v3: Enable ACPI based " shameer
2017-05-13 9:47 ` [RFC v1 7/7] iommu/arm-smmu-v3: Enable ACPI based HiSilicon erratum 161010801 shameer
2017-05-16 13:50 ` Robin Murphy
2017-05-16 14:03 ` Shameerali Kolothum Thodi
[not found] ` <5FC3163CFD30C246ABAA99954A238FA838350A62-WFPaWmAhWqtUuCJht5byYAK1hpo4iccwjNknBlVQO8k@public.gmane.org>
2017-05-17 8:05 ` John Garry
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