From: Jeremy Linton <jeremy.linton@arm.com>
To: Punit Agrawal <punit.agrawal@arm.com>
Cc: mark.rutland@arm.com, Lorenzo.Pieralisi@arm.com,
linux-acpi@vger.kernel.org, alexander.shishkin@linux.intel.com,
catalin.marinas@arm.com, Steve.Capper@arm.com,
will.deacon@arm.com, acme@kernel.org, mlangsdorf@redhat.com,
peterz@infradead.org, mingo@redhat.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 09/11] arm64: pmu: Add routines for detecting differing PMU types in the system
Date: Fri, 1 Jul 2016 09:54:41 -0500 [thread overview]
Message-ID: <57768431.7080508@arm.com> (raw)
In-Reply-To: <87mvm1e9ye.fsf@e105922-lin.cambridge.arm.com>
On 07/01/2016 08:58 AM, Punit Agrawal wrote:
> Jeremy Linton <jeremy.linton@arm.com> writes:
>
>> In preparation for enabling heterogeneous PMUs on ACPI systems
>> add routines that detect this and group the resulting PMUs and
>> interrupts.
>>
>> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
>> ---
>> drivers/perf/arm_pmu_acpi.c | 137 +++++++++++++++++++++++++++++++++++++++++++-
>> 1 file changed, 134 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/perf/arm_pmu_acpi.c b/drivers/perf/arm_pmu_acpi.c
>> index a24cdd0..482a54d 100644
>> --- a/drivers/perf/arm_pmu_acpi.c
>> +++ b/drivers/perf/arm_pmu_acpi.c
>> @@ -1,23 +1,36 @@
>> /*
>> - * PMU support
>> + * ARM ACPI PMU support
>> *
>> * Copyright (C) 2015 Red Hat Inc.
>> + * Copyright (C) 2016 ARM Ltd.
>> * Author: Mark Salter <msalter@redhat.com>
>> + * Jeremy Linton <jeremy.linton@arm.com>
>> *
>> * This work is licensed under the terms of the GNU GPL, version 2. See
>> * the COPYING file in the top-level directory.
>> *
>> */
>>
>> +#define pr_fmt(fmt) "ACPI-PMU: " fmt
>> +
>> +#include <asm/cpu.h>
>> #include <linux/perf/arm_pmu.h>
>> #include <linux/platform_device.h>
>> #include <linux/acpi.h>
>> #include <linux/irq.h>
>> #include <linux/irqdesc.h>
>> +#include <linux/list.h>
>>
>> struct pmu_irq {
>> - int gsi;
>> - int trigger;
>> + int gsi;
>> + int trigger;
>> + bool registered;
>> +};
>> +
>> +struct pmu_types {
>> + struct list_head list;
>> + int cpu_type;
>> + int cpu_count;
>> };
>
> You can stash the associated resources in the above structure. That
> should simplify some code below.
How is that? One structure is per cpu, the other is per pmu type in the
system, they are actually completely independent and intertwining them
will only server to obfuscate the code.
>
>>
>> static struct pmu_irq pmu_irqs[NR_CPUS] __initdata;
>> @@ -36,6 +49,124 @@ void __init arm_pmu_parse_acpi(int cpu, struct acpi_madt_generic_interrupt *gic)
>> pmu_irqs[cpu].trigger = ACPI_LEVEL_SENSITIVE;
>> }
>>
>> +/* Count number and type of CPU cores in the system. */
>> +void __init arm_pmu_acpi_determine_cpu_types(struct list_head *pmus)
>> +{
>> + int i;
>> +
>> + for_each_possible_cpu(i) {
>> + struct cpuinfo_arm64 *cinfo = per_cpu_ptr(&cpu_data, i);
>> + u32 partnum = MIDR_PARTNUM(cinfo->reg_midr);
>> + struct pmu_types *pmu;
>> +
>> + list_for_each_entry(pmu, pmus, list) {
>> + if (pmu->cpu_type == partnum) {
>> + pmu->cpu_count++;
>> + break;
>> + }
>> + }
>> +
>> + /* we didn't find the CPU type, add an entry to identify it */
>> + if (&pmu->list == pmus) {
>> + pmu = kcalloc(1, sizeof(struct pmu_types), GFP_KERNEL);
>
> Use kzalloc here.
Ok fair point.
>
>> + if (!pmu) {
>> + pr_warn("Unable to allocate pmu_types\n");
>
> Bail out with error if the memory can't be allocated. Otherwise, we risk
> silently failing to register a PMU type.
? Its not silent, it fails to allocate the space complains about it, and
therefor this pmu type is not created. In a system with a single CPU
this basically cancels the whole operation. If there is more than one
pmu, the remaining PMUs continue to have a chance of being created,
although if the memory allocation fails (this is pretty early boot code)
there is a high probability there is something seriously wrong with the
system.
>
>> + } else {
>> + pmu->cpu_type = partnum;
>> + pmu->cpu_count++;
>> + list_add_tail(&pmu->list, pmus);
>> + }
>> + }
>> + }
>> +}
>> +
>> +/*
>> + * Registers the group of PMU interfaces which correspond to the 'last_cpu_id'.
>> + * This group utilizes 'count' resources in the 'res'.
>> + */
>> +int __init arm_pmu_acpi_register_pmu(int count, struct resource *res,
>> + int last_cpu_id)
>> +{
>
> With the addition of the irq resources to struct pmu_types, you can just pass
> the pmu structure here.
Thats a point, but the lifetimes of the structures are different and
outside of their shared use in this single function never really
interact. I prefer not unnecessarily intertwine independent data
structures simply to reduce parameter counts for a single function.
Especially since it complicates cleanup because the validity of the
resource structure will have to be tracked relative to its successful
registration.
next prev parent reply other threads:[~2016-07-01 14:54 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-21 17:11 [PATCH v6 00/11] Enable PMUs in ACPI systems Jeremy Linton
2016-06-21 17:11 ` [PATCH 01/11] arm64: pmu: add fallback probe table Jeremy Linton
2016-06-21 17:11 ` [PATCH 02/11] arm64: pmu: Probe default hw/cache counters Jeremy Linton
2016-06-21 17:11 ` [PATCH 03/11] arm64: pmu: Hoist pmu platform device name Jeremy Linton
2016-06-21 17:11 ` [PATCH 04/11] arm64: Rename the common MADT parse routine Jeremy Linton
2016-06-21 17:11 ` [PATCH 05/11] arm64: pmu: Add support for probing with ACPI Jeremy Linton
2016-07-06 16:45 ` Will Deacon
2016-06-21 17:11 ` [PATCH 06/11] arm: arm64: Add routine to determine cpuid of other cpus Jeremy Linton
2016-07-06 16:30 ` Will Deacon
2016-07-07 0:34 ` Jeremy Linton
2016-06-21 17:11 ` [PATCH 07/11] arm: arm64: pmu: Assign platform PMU CPU affinity Jeremy Linton
2016-07-01 14:00 ` Punit Agrawal
2016-06-21 17:11 ` [PATCH 08/11] arm64: pmu: Provide cpumask attribute for PMU Jeremy Linton
2016-07-07 16:21 ` Mark Rutland
2016-07-11 15:05 ` Jeremy Linton
2016-07-11 15:58 ` Mark Rutland
2016-07-11 16:14 ` Will Deacon
2016-06-21 17:11 ` [PATCH 09/11] arm64: pmu: Add routines for detecting differing PMU types in the system Jeremy Linton
2016-07-01 13:58 ` Punit Agrawal
2016-07-01 14:54 ` Jeremy Linton [this message]
2016-07-01 15:43 ` Punit Agrawal
2016-07-01 16:21 ` Jeremy Linton
2016-07-01 15:28 ` Jeremy Linton
2016-06-21 17:11 ` [PATCH 10/11] arm64: pmu: Enable multiple PMUs in an ACPI system Jeremy Linton
2016-07-01 13:57 ` Punit Agrawal
2016-06-21 17:11 ` [PATCH 11/11] MAINTAINERS: Tweak ARM PMU maintainers Jeremy Linton
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