From: Dave Jiang <dave.jiang@intel.com>
To: Dan Williams <dan.j.williams@intel.com>,
<linux-cxl@vger.kernel.org>, <linux-acpi@vger.kernel.org>
Cc: <ira.weiny@intel.com>, <vishal.l.verma@intel.com>,
<alison.schofield@intel.com>, <jonathan.cameron@huawei.com>,
<dave@stgolabs.net>, <brice.goglin@gmail.com>,
<nifan.cxl@gmail.com>, <rafael@kernel.org>,
<gregkh@linuxfoundation.org>
Subject: Re: [PATCH v4 05/11] cxl: Split out combine_coordinates() for common shared usage
Date: Mon, 22 Jan 2024 09:19:59 -0700 [thread overview]
Message-ID: <602df940-ec6e-45d7-bef1-9f0c89e008fd@intel.com> (raw)
In-Reply-To: <65ab154b256ca_37ad294cc@dwillia2-xfh.jf.intel.com.notmuch>
On 1/19/24 17:35, Dan Williams wrote:
> Dave Jiang wrote:
>> Refactor the common code of combining coordinates in order to reduce code.
>> Create a new function cxl_cooordinates_combine() it combine two 'struct
>> access_coordinate'.
>>
>> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
>> ---
>> drivers/cxl/core/cdat.c | 32 +++++++++++++++++++++++---------
>> drivers/cxl/core/port.c | 18 ++----------------
>> drivers/cxl/cxl.h | 4 ++++
>> 3 files changed, 29 insertions(+), 25 deletions(-)
>>
>> diff --git a/drivers/cxl/core/cdat.c b/drivers/cxl/core/cdat.c
>> index cd84d87f597a..4d542627d02d 100644
>> --- a/drivers/cxl/core/cdat.c
>> +++ b/drivers/cxl/core/cdat.c
>> @@ -183,15 +183,7 @@ static int cxl_port_perf_data_calculate(struct cxl_port *port,
>> xa_for_each(dsmas_xa, index, dent) {
>> int qos_class;
>>
>> - dent->coord.read_latency = dent->coord.read_latency +
>> - c.read_latency;
>> - dent->coord.write_latency = dent->coord.write_latency +
>> - c.write_latency;
>> - dent->coord.read_bandwidth = min_t(int, c.read_bandwidth,
>> - dent->coord.read_bandwidth);
>> - dent->coord.write_bandwidth = min_t(int, c.write_bandwidth,
>> - dent->coord.write_bandwidth);
>> -
>> + cxl_coordinates_combine(&dent->coord, &dent->coord, &c);
>> dent->entries = 1;
>> rc = cxl_root->ops->qos_class(root_port, &dent->coord, 1, &qos_class);
>> if (rc != 1)
>> @@ -514,4 +506,26 @@ void cxl_switch_parse_cdat(struct cxl_port *port)
>> }
>> EXPORT_SYMBOL_NS_GPL(cxl_switch_parse_cdat, CXL);
>>
>> +/**
>> + * cxl_coordinates_combine - Combine the two input coordinates into the first
>> + *
>> + * @c1: first coordinate, to be written to
>> + * @c2: second coordinate
>> + */
>> +void cxl_coordinates_combine(struct access_coordinate *out,
>> + struct access_coordinate *c1,
>> + struct access_coordinate *c2)
>> +{
>> + if (c2->write_bandwidth)
>> + out->write_bandwidth = min(c1->write_bandwidth,
>> + c2->write_bandwidth);
>> + out->write_latency = c1->write_latency + c2->write_latency;
>> +
>> + if (c2->read_bandwidth)
>> + out->read_bandwidth = min(c1->read_bandwidth,
>> + c2->read_bandwidth);
>> + out->read_latency = c1->read_latency + c2->read_latency;
>> +}
>> +EXPORT_SYMBOL_NS_GPL(cxl_coordinates_combine, CXL);
>
> There is no need for EXPORT_SYMBOL() when the definition and the only
> caller exist within the same compilation unit, cxl_core.o.
>
> However, given there is nothing "CXL" about this function it likely wants
> to move out of cxl_core.o if another caller ever arrives.
It's mostly used by core/cdat.c but eventually also used by core/port.c. So it's all within the core.
>
next prev parent reply other threads:[~2024-01-22 16:20 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-19 17:23 [PATCH v4 00/11] cxl: Add support to report region access coordinates to numa nodes Dave Jiang
2024-01-19 17:23 ` [PATCH v4 01/11] ACPI: HMAT: Remove register of memory node for generic target Dave Jiang
2024-01-19 17:23 ` [PATCH v4 02/11] base/node / ACPI: Enumerate node access class for 'struct access_coordinate' Dave Jiang
2024-01-19 17:23 ` [PATCH v4 03/11] ACPI: HMAT: Introduce 2 levels of generic port access class Dave Jiang
2024-01-19 17:23 ` [PATCH v4 04/11] ACPI: HMAT / cxl: Add retrieval of generic port coordinates for both access classes Dave Jiang
2024-01-19 17:23 ` [PATCH v4 05/11] cxl: Split out combine_coordinates() for common shared usage Dave Jiang
2024-01-20 0:35 ` Dan Williams
2024-01-22 16:19 ` Dave Jiang [this message]
2024-01-19 17:23 ` [PATCH v4 06/11] cxl: Split out host bridge access coordinates Dave Jiang
2024-01-19 17:23 ` [PATCH v4 07/11] cxl: Set cxlmd->endpoint before adding port device Dave Jiang
2024-01-19 17:23 ` [PATCH v4 08/11] cxl/region: Calculate performance data for a region Dave Jiang
2024-01-31 2:22 ` Wonjae Lee
2024-01-31 15:56 ` Dave Jiang
2024-02-14 17:54 ` Jonathan Cameron
2024-01-19 17:23 ` [PATCH v4 09/11] cxl/region: Add sysfs attribute for locality attributes of CXL regions Dave Jiang
2024-01-19 17:24 ` [PATCH v4 10/11] cxl: Add memory hotplug notifier for cxl region Dave Jiang
2024-01-19 17:24 ` [PATCH v4 11/11] cxl: Deal with numa nodes not enumarated by SRAT Dave Jiang
2024-01-20 3:55 ` Alison Schofield
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