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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?DNdu24eXkXAl2f7++z1NpwsYymGmcItXftQrdUvn8sZCJeg93n7RwvszzrJp?= =?us-ascii?Q?Wmqto0IZzJ8wuVFE+Y3Rm2HOxtIC+ImjGcgH7cmzIRKe9ELuFyZ3fqEiT/H9?= =?us-ascii?Q?qBCt0lLJs4EykSwp1WG+5bkZZ0NGNjwWCw2oQjDZijHUbgPfV5fKD6ABUAdf?= =?us-ascii?Q?mysz3BtpcffkVQX/CYUzZYxeQZ+waohiERdsWNANMfish4ldIA08hJHUAQ52?= =?us-ascii?Q?PCtv0bmA/429Ga5kg2mHwNSVj0rKpeIURjA860ifbuqcI+xoWTK0+BEkWi/0?= =?us-ascii?Q?+6FctM9mI45mhVhtFvdtKz00DShNXJYHyVua0ngSBWkzQuUbRbvJ1sGqNDa7?= =?us-ascii?Q?uMfRbhg9njW9KK5ketBef3CNzxMdXbd7kUYVp2wmRnnN6LrfPUbUQDtGz5NA?= =?us-ascii?Q?MzsXkZDTxS0+UHSePpDduVXLyb+fFiFgWhph2VkuV4U+bELaAYe3qGyATsZI?= =?us-ascii?Q?AgQIII3mJGMzghm5lRfI9q4IB+ZCApLZs02/sRALrvqRJug78Ttqyu4c1/M7?= =?us-ascii?Q?Z0gwFOsgGcCvg0x+1Z8dmHHn+h15gYGzRCZbl9vuI5e0aSEvokOWdEmKEk2c?= =?us-ascii?Q?sFp00Lev3yM5KDp3jFmgXsbw/pDNTONKcdId24hO4irIV4FvEL+PvSMDvWCO?= =?us-ascii?Q?FB+0K1LcrgcOLjF/XQ9zxitbGWSBKqJc4IUNfR4usA84vnKZeY4o75tGQ+k1?= =?us-ascii?Q?pHWZba0wjdyI3gxzwJ3KyLxitH31RQvr+k77/T7Ct5dLUpvYe1uHA6p3hGU2?= =?us-ascii?Q?EW97Vnz+mhPXIAifmOS7YvUrWinR+/FPgnwFOc+hxCL1swalwDZe/MWl+uhI?= =?us-ascii?Q?LSBRfShB6kUUuOYMohStPxNz4dzEgL8WzjfVILAK8GYsaA2qi7ZZZhzzAYc2?= =?us-ascii?Q?fjL4kkqpKYGZ2iNDGz1rMol43BJ4RP+6QJsz65vZr1MlS+MGc+q0ImrHTLjq?= =?us-ascii?Q?PFxpQId1hacbXJRzES5KAIr2HfskpZ7/sASugUJISnxkym6ifTVvcBcQDAZx?= =?us-ascii?Q?FEofLhgPi1GR1kpF/Cv8feLlkJOj+bCbUevrymEW58+QCc8jLjtvgSmc/2S3?= =?us-ascii?Q?2jpkp223BdCvsV0uOpJN9atk5cRKuM/LJMudEqkfYM0altWHhlBY7y3hmvJ8?= =?us-ascii?Q?9aa4m6YTbbv1YFn8qtzoIIqQGayPnriEsoBUVMK0CrmMDj1dbIaWehyLWmeO?= =?us-ascii?Q?oSRmHllJpKQDYFLUt1AUgcK3gTT7ERQKGyuQKcPBASNYNLzsaOhSWsHYn1x5?= =?us-ascii?Q?liTWlodAbW52TUC4cEJjbKXFD/pWgqA2AT6OGrIoOZmFeJrnfIJgWv09k00X?= =?us-ascii?Q?WZiKmJizZJDIrN5ILT2E9BDtWWXXyUHLPq7GsD8fwufPng9ZktiaxT9LwcPO?= =?us-ascii?Q?auNDqu4m5ZckrvxdVD0zTmC/lDmxoTZV3SwYFRdo1P+7mz5yfrFgkOkS4OWp?= =?us-ascii?Q?W2JV/DWewgCfF4kPESKEEIDs99HTFFOEVVExJGJbwjkiCo22WAKxxVb8O8K2?= =?us-ascii?Q?GjGoHDswiLYSob0rEciHlT+n3Km3FEKaSx+b4khXCm/seEka3AMFkjxyuaKH?= =?us-ascii?Q?SHMg+4DB2aVHhwGw6mYyf9+TOSabH6DX0fMsxcJKQCg8kCu2CDJdFYfmtsV8?= =?us-ascii?Q?/w=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: 9f2b842a-2ff8-457d-3472-08db4515c04b X-MS-Exchange-CrossTenant-AuthSource: PH8PR11MB8107.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Apr 2023 22:46:32.8931 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Rr7Z4yCjg+kqJSMVa6NcQnp0yEVdr1vGbKxtRs6dx0lMfKzyKjzUgNezdMrsyh2qil7+if3SZjlkmesNaZZeSZdmMOhJ/JKbRdg79Z6jzls= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR11MB4926 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Dave Jiang wrote: > Provide a callback to parse the Device Scoped Latency and Bandwidth > Information Structure (DSLBIS) in the CDAT structures. The DSLBIS > contains the bandwidth and latency information that's tied to a DSMAS > handle. The driver will retrieve the read and write latency and > bandwidth associated with the DSMAS which is tied to a DPA range. > > Coherent Device Attribute Table 1.03 2.1 Device Scoped Latency and > Bandwidth Information Structure (DSLBIS) > > Signed-off-by: Dave Jiang > > --- > v3: > - Added spec section in commit header. (Alison) > - Remove void * recast. (Alison) > - Rework comment. (Alison) > - Move CDAT parse to cxl_endpoint_port_probe() > - Convert to use 'struct node_hmem_attrs' > > v2: > - Add size check to DSLIBIS table. (Lukas) > - Remove unnecessary entry type check. (Jonathan) > - Move data_type check to after match. (Jonathan) > - Skip unknown data type. (Jonathan) > - Add overflow check for unit multiply. (Jonathan) > - Use dev_warn() when entries parsing fail. (Jonathan) > --- > drivers/cxl/core/cdat.c | 68 +++++++++++++++++++++++++++++++++++++++++++++++ > drivers/cxl/cxlpci.h | 34 +++++++++++++++++++++++- > drivers/cxl/port.c | 11 +++++++- > 3 files changed, 111 insertions(+), 2 deletions(-) > > diff --git a/drivers/cxl/core/cdat.c b/drivers/cxl/core/cdat.c > index 6f20af83a3ed..e8b9bb99dfdf 100644 > --- a/drivers/cxl/core/cdat.c > +++ b/drivers/cxl/core/cdat.c > @@ -1,5 +1,6 @@ > // SPDX-License-Identifier: GPL-2.0-only > /* Copyright(c) 2023 Intel Corporation. All rights reserved. */ > +#include > #include "cxlpci.h" > #include "cxl.h" > > @@ -124,3 +125,70 @@ int cxl_dsmas_parse_entry(struct cdat_entry_header *header, void *arg) > return 0; > } > EXPORT_SYMBOL_NS_GPL(cxl_dsmas_parse_entry, CXL); > + > +static void cxl_hmem_attrs_set(struct node_hmem_attrs *attrs, > + int access, unsigned int val) > +{ > + switch (access) { > + case HMAT_SLLBIS_ACCESS_LATENCY: > + attrs->read_latency = val; > + attrs->write_latency = val; > + break; > + case HMAT_SLLBIS_READ_LATENCY: > + attrs->read_latency = val; > + break; > + case HMAT_SLLBIS_WRITE_LATENCY: > + attrs->write_latency = val; > + break; > + case HMAT_SLLBIS_ACCESS_BANDWIDTH: > + attrs->read_bandwidth = val; > + attrs->write_bandwidth = val; > + break; > + case HMAT_SLLBIS_READ_BANDWIDTH: > + attrs->read_bandwidth = val; > + break; > + case HMAT_SLLBIS_WRITE_BANDWIDTH: > + attrs->write_bandwidth = val; > + break; > + } > +} > + > +int cxl_dslbis_parse_entry(struct cdat_entry_header *header, void *arg) > +{ > + struct cdat_dslbis *dslbis = (struct cdat_dslbis *)header; > + struct list_head *dsmas_list = arg; > + struct dsmas_entry *dent; > + > + if (dslbis->hdr.length != sizeof(*dslbis)) { > + pr_warn("Malformed DSLBIS table length: (%lu:%u)\n", > + (unsigned long)sizeof(*dslbis), dslbis->hdr.length); > + return -EINVAL; > + } > + > + /* Skip unrecognized data type */ > + if (dslbis->data_type >= HMAT_SLLBIS_DATA_TYPE_MAX) > + return 0; > + > + list_for_each_entry(dent, dsmas_list, list) { > + u64 val; > + int rc; > + > + if (dslbis->handle != dent->handle) > + continue; Oh, now I see why the list is needed. Update the changelog of the previous patch to indicate that the entries are cached to a list so they can be cross referenced during dslbis parsing. At least that would have saved me from picking on it. > + > + /* Not a memory type, skip */ > + if ((dslbis->flags & DSLBIS_MEM_MASK) != DSLBIS_MEM_MEMORY) > + return 0; > + > + rc = check_mul_overflow(le64_to_cpu(dslbis->entry_base_unit), > + le16_to_cpu(dslbis->entry[0]), &val); > + if (unlikely(rc)) Don't use likely() / unlikely() without performance numbers. The compiler generally does a better job and this is not a hot path.