From: Dave Jiang <dave.jiang@intel.com>
To: Ira Weiny <ira.weiny@intel.com>, Dan Williams <dan.j.williams@intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Ben Widawsky <bwidawsk@kernel.org>,
Steven Rostedt <rostedt@goodmis.org>,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-cxl@vger.kernel.org
Subject: Re: [PATCH v7 8/8] cxl/test: Simulate event log overflow
Date: Tue, 9 May 2023 15:31:43 -0700 [thread overview]
Message-ID: <7d35c9f2-9070-32d0-2ddc-ff6b0a8b5c26@intel.com> (raw)
In-Reply-To: <20221216-cxl-ev-log-v7-8-2316a5c8f7d8@intel.com>
On 1/17/23 10:53 PM, Ira Weiny wrote:
> Log overflow is marked by a separate trace message.
>
> Simulate a log with lots of messages and flag overflow until space is
> cleared.
>
> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
>
> ---
> Changes in v7:
> <no change>
> ---
> tools/testing/cxl/test/mem.c | 50 +++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 49 insertions(+), 1 deletion(-)
>
> diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c
> index 00bf19a68604..9263b04d35f7 100644
> --- a/tools/testing/cxl/test/mem.c
> +++ b/tools/testing/cxl/test/mem.c
> @@ -78,6 +78,8 @@ struct mock_event_log {
> u16 clear_idx;
> u16 cur_idx;
> u16 nr_events;
> + u16 nr_overflow;
> + u16 overflow_reset;
> struct cxl_event_record_raw *events[CXL_TEST_EVENT_CNT_MAX];
> };
>
> @@ -116,6 +118,7 @@ static void event_reset_log(struct mock_event_log *log)
> {
> log->cur_idx = 0;
> log->clear_idx = 0;
> + log->nr_overflow = log->overflow_reset;
> }
>
> /* Handle can never be 0 use 1 based indexing for handle */
> @@ -147,8 +150,12 @@ static void mes_add_event(struct mock_event_store *mes,
> return;
>
> log = &mes->mock_logs[log_type];
> - if (WARN_ON(log->nr_events >= CXL_TEST_EVENT_CNT_MAX))
> +
> + if ((log->nr_events + 1) > CXL_TEST_EVENT_CNT_MAX) {
> + log->nr_overflow++;
> + log->overflow_reset = log->nr_overflow;
> return;
> + }
>
> log->events[log->nr_events] = event;
> log->nr_events++;
> @@ -159,6 +166,7 @@ static int mock_get_event(struct cxl_dev_state *cxlds,
> {
> struct cxl_get_event_payload *pl;
> struct mock_event_log *log;
> + u16 nr_overflow;
> u8 log_type;
> int i;
>
> @@ -191,6 +199,19 @@ static int mock_get_event(struct cxl_dev_state *cxlds,
> if (!event_log_empty(log))
> pl->flags |= CXL_GET_EVENT_FLAG_MORE_RECORDS;
>
> + if (log->nr_overflow) {
> + u64 ns;
> +
> + pl->flags |= CXL_GET_EVENT_FLAG_OVERFLOW;
> + pl->overflow_err_count = cpu_to_le16(nr_overflow);
> + ns = ktime_get_real_ns();
> + ns -= 5000000000; /* 5s ago */
> + pl->first_overflow_timestamp = cpu_to_le64(ns);
> + ns = ktime_get_real_ns();
> + ns -= 1000000000; /* 1s ago */
> + pl->last_overflow_timestamp = cpu_to_le64(ns);
> + }
> +
> return 0;
> }
>
> @@ -231,6 +252,9 @@ static int mock_clear_event(struct cxl_dev_state *cxlds,
> }
> }
>
> + if (log->nr_overflow)
> + log->nr_overflow = 0;
> +
> /* Clear events */
> log->clear_idx += pl->nr_recs;
> return 0;
> @@ -353,6 +377,30 @@ static void cxl_mock_add_event_logs(struct mock_event_store *mes)
> (struct cxl_event_record_raw *)&mem_module);
> mes->ev_status |= CXLDEV_EVENT_STATUS_INFO;
>
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &maint_needed);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &hardware_replace);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL,
> + (struct cxl_event_record_raw *)&dram);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL,
> + (struct cxl_event_record_raw *)&gen_media);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL,
> + (struct cxl_event_record_raw *)&mem_module);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &hardware_replace);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL,
> + (struct cxl_event_record_raw *)&dram);
> + /* Overflow this log */
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &hardware_replace);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &hardware_replace);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &hardware_replace);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &hardware_replace);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &hardware_replace);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &hardware_replace);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &hardware_replace);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &hardware_replace);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &hardware_replace);
> + mes_add_event(mes, CXL_EVENT_TYPE_FAIL, &hardware_replace);
> + mes->ev_status |= CXLDEV_EVENT_STATUS_FAIL;
> +
> mes_add_event(mes, CXL_EVENT_TYPE_FATAL, &hardware_replace);
> mes_add_event(mes, CXL_EVENT_TYPE_FATAL,
> (struct cxl_event_record_raw *)&dram);
>
prev parent reply other threads:[~2023-05-09 22:31 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-18 5:53 [PATCH v7 0/8] cxl: Process event logs Ira Weiny
2023-01-18 5:53 ` [PATCH v7 1/8] cxl/mem: Read, trace, and clear events on driver load Ira Weiny
2023-01-26 21:53 ` Dan Williams
2023-01-27 0:49 ` Dan Williams
2023-01-27 19:45 ` Ira Weiny
2023-05-05 9:47 ` Huai-Cheng
2023-05-08 2:41 ` Ira Weiny
2023-05-09 21:41 ` Dave Jiang
2023-01-18 5:53 ` [PATCH v7 2/8] cxl/mem: Wire up event interrupts ira.weiny
2023-01-26 22:00 ` Dan Williams
2023-05-09 21:42 ` Dave Jiang
[not found] ` <tencent_D9D9D358330CA573E23D490C6EE13E0DC105@qq.com>
2023-05-19 1:38 ` CXL memory device not created correctly Davidlohr Bueso
2023-05-19 15:10 ` Jonathan Cameron
2023-05-19 15:20 ` Ira Weiny
2023-05-19 15:37 ` Jonathan Cameron
2023-05-31 2:18 ` Luis Chamberlain
2023-06-01 3:12 ` Ira Weiny
2023-06-01 3:46 ` Davidlohr Bueso
2023-01-18 5:53 ` [PATCH v7 3/8] cxl/mem: Trace General Media Event Record Ira Weiny
2023-05-09 21:47 ` Dave Jiang
2023-01-18 5:53 ` [PATCH v7 4/8] cxl/mem: Trace DRAM " Ira Weiny
2023-05-09 21:48 ` Dave Jiang
2023-01-18 5:53 ` [PATCH v7 5/8] cxl/mem: Trace Memory Module " Ira Weiny
2023-05-09 21:52 ` Dave Jiang
2023-01-18 5:53 ` [PATCH v7 6/8] cxl/test: Add generic mock events Ira Weiny
2023-05-09 22:03 ` Dave Jiang
2023-01-18 5:53 ` [PATCH v7 7/8] cxl/test: Add specific events Ira Weiny
2023-05-09 22:08 ` Dave Jiang
2023-01-18 5:53 ` [PATCH v7 8/8] cxl/test: Simulate event log overflow Ira Weiny
2023-05-09 22:31 ` Dave Jiang [this message]
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