Re: [PATCH v2 09/29] arm_mpam: Add MPAM MSC register layout definitions

Gavin Shan
2025-10-06T23:26:10Z

Hi James,

On 9/11/25 6:42 AM, James Morse wrote:
> Memory Partitioning and Monitoring (MPAM) has memory mapped devices
> (MSCs) with an identity/configuration page.
>
> Add the definitions for these registers as offset within the page(s).
>
> Link: https://developer.arm.com/documentation/ihi0099/latest/
> Signed-off-by: James Morse <james.morse@arm.com>
> Reviewed-by: Ben Horgan <ben.horgan@arm.com>
> ---
> Changes since v1:
> * Whitespace.
> * Added constants for CASSOC and XCL.
> * Merged FLT/CTL defines.
> * Fixed MSMON_CFG_CSU_CTL_TYPE_CSU definition.
>
> Changes since RFC:
> * Renamed MSMON_CFG_MBWU_CTL_TYPE_CSU as MSMON_CFG_CSU_CTL_TYPE_CSU
> * Whitepsace churn.
> * Cite a more recent document.
> * Removed some stale feature, fixed some names etc.
> ---
> drivers/resctrl/mpam_internal.h | 267 ++++++++++++++++++++++++++++++++
> 1 file changed, 267 insertions(+)
>
> diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h
> index 02e9576ece6b..109f03df46c2 100644
> --- a/drivers/resctrl/mpam_internal.h
> +++ b/drivers/resctrl/mpam_internal.h
> @@ -152,4 +152,271 @@ extern struct list_head mpam_classes;
> int mpam_get_cpumask_from_cache_id(unsigned long cache_id, u32 cache_level,
> cpumask_t *affinity);
>
> +/*
> + * MPAM MSCs have the following register layout. See:
> + * Arm Memory System Resource Partitioning and Monitoring (MPAM) System
> + * Component Specification.
> + * https://developer.arm.com/documentation/ihi0099/latest/
> + */
> +#define MPAM_ARCHITECTURE_V1 0x10
> +
> +/* Memory mapped control pages: */

":" seems unnecessary.

> +/* ID Register offsets in the memory mapped page */
> +#define MPAMF_IDR 0x0000 /* features id register */
> +#define MPAMF_MSMON_IDR 0x0080 /* performance monitoring features */
> +#define MPAMF_IMPL_IDR 0x0028 /* imp-def partitioning */
> +#define MPAMF_CPOR_IDR 0x0030 /* cache-portion partitioning */
> +#define MPAMF_CCAP_IDR 0x0038 /* cache-capacity partitioning */
> +#define MPAMF_MBW_IDR 0x0040 /* mem-bw partitioning */
> +#define MPAMF_PRI_IDR 0x0048 /* priority partitioning */
> +#define MPAMF_CSUMON_IDR 0x0088 /* cache-usage monitor */
> +#define MPAMF_MBWUMON_IDR 0x0090 /* mem-bw usage monitor */
> +#define MPAMF_PARTID_NRW_IDR 0x0050 /* partid-narrowing */
> +#define MPAMF_IIDR 0x0018 /* implementer id register */
> +#define MPAMF_AIDR 0x0020 /* architectural id register */
> +
> +/* Configuration and Status Register offsets in the memory mapped page */
> +#define MPAMCFG_PART_SEL 0x0100 /* partid to configure: */

":" seems unnecessary.

> +#define MPAMCFG_CPBM 0x1000 /* cache-portion config */
> +#define MPAMCFG_CMAX 0x0108 /* cache-capacity config */
> +#define MPAMCFG_CMIN 0x0110 /* cache-capacity config */
> +#define MPAMCFG_CASSOC 0x0118 /* cache-associativity config */
> +#define MPAMCFG_MBW_MIN 0x0200 /* min mem-bw config */
> +#define MPAMCFG_MBW_MAX 0x0208 /* max mem-bw config */
> +#define MPAMCFG_MBW_WINWD 0x0220 /* mem-bw accounting window config */
> +#define MPAMCFG_MBW_PBM 0x2000 /* mem-bw portion bitmap config */
> +#define MPAMCFG_PRI 0x0400 /* priority partitioning config */
> +#define MPAMCFG_MBW_PROP 0x0500 /* mem-bw stride config */
> +#define MPAMCFG_INTPARTID 0x0600 /* partid-narrowing config */
> +

[...]

Thanks,
Gavin