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From: "lihuisong (C)" <lihuisong@huawei.com>
To: Jie Zhan <zhanjie9@hisilicon.com>, <ionela.voinescu@arm.com>,
	<beata.michalska@arm.com>, <wangxiongfeng2@huawei.com>,
	<viresh.kumar@linaro.org>, <rafael@kernel.org>
Cc: <linux-pm@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <linuxarm@huawei.com>,
	<jonathan.cameron@huawei.com>, <wanghuiqiang@huawei.com>,
	<zhenglifeng1@huawei.com>, <yangyicong@huawei.com>,
	<liaochang1@huawei.com>, <zengheng4@huawei.com>
Subject: Re: [PATCH v3 2/2] cppc_cpufreq: Remove HiSilicon CPPC workaround
Date: Wed, 25 Sep 2024 17:36:12 +0800	[thread overview]
Message-ID: <82f4fa82-ee37-5328-4792-3143a2f0ac6f@huawei.com> (raw)
In-Reply-To: <20240919084552.3591400-3-zhanjie9@hisilicon.com>

LGTM,

Reviewed-by: Huisong Li <lihuisong@huawei.com>

在 2024/9/19 16:45, Jie Zhan 写道:
> Since commit 6c8d750f9784 ("cpufreq / cppc: Work around for Hisilicon CPPC
> cpufreq"), we introduce a workround for HiSilicon platforms that do not
> support performance feedback counters, whereas they can get the actual
> frequency from the desired perf register.  Later on, FIE is disabled in
> that workaround as well.
>
> Now the workround can be handled by the common code.  Desired perf would be
> read and converted to frequency if feedback counters don't change.  FIE
> would be disabled if the CPPC regs are in PCC region.
>
> Hence, the workaround is no longer needed and can be safely removed, in an
> effort to consolidate the driver procedure.
>
> Signed-off-by: Jie Zhan <zhanjie9@hisilicon.com>
> ---
>   drivers/cpufreq/cppc_cpufreq.c | 71 ----------------------------------
>   1 file changed, 71 deletions(-)
>
> diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
> index e55192303a9f..0e95ad2303ea 100644
> --- a/drivers/cpufreq/cppc_cpufreq.c
> +++ b/drivers/cpufreq/cppc_cpufreq.c
> @@ -36,24 +36,6 @@ static LIST_HEAD(cpu_data_list);
>   
>   static bool boost_supported;
>   
> -struct cppc_workaround_oem_info {
> -	char oem_id[ACPI_OEM_ID_SIZE + 1];
> -	char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
> -	u32 oem_revision;
> -};
> -
> -static struct cppc_workaround_oem_info wa_info[] = {
> -	{
> -		.oem_id		= "HISI  ",
> -		.oem_table_id	= "HIP07   ",
> -		.oem_revision	= 0,
> -	}, {
> -		.oem_id		= "HISI  ",
> -		.oem_table_id	= "HIP08   ",
> -		.oem_revision	= 0,
> -	}
> -};
> -
>   static struct cpufreq_driver cppc_cpufreq_driver;
>   
>   static enum {
> @@ -78,7 +60,6 @@ struct cppc_freq_invariance {
>   static DEFINE_PER_CPU(struct cppc_freq_invariance, cppc_freq_inv);
>   static struct kthread_worker *kworker_fie;
>   
> -static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu);
>   static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data,
>   				 struct cppc_perf_fb_ctrs *fb_ctrs_t0,
>   				 struct cppc_perf_fb_ctrs *fb_ctrs_t1);
> @@ -841,57 +822,6 @@ static struct cpufreq_driver cppc_cpufreq_driver = {
>   	.name = "cppc_cpufreq",
>   };
>   
> -/*
> - * HISI platform does not support delivered performance counter and
> - * reference performance counter. It can calculate the performance using the
> - * platform specific mechanism. We reuse the desired performance register to
> - * store the real performance calculated by the platform.
> - */
> -static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu)
> -{
> -	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
> -	struct cppc_cpudata *cpu_data;
> -	u64 desired_perf;
> -	int ret;
> -
> -	if (!policy)
> -		return -ENODEV;
> -
> -	cpu_data = policy->driver_data;
> -
> -	cpufreq_cpu_put(policy);
> -
> -	ret = cppc_get_desired_perf(cpu, &desired_perf);
> -	if (ret < 0)
> -		return -EIO;
> -
> -	return cppc_perf_to_khz(&cpu_data->perf_caps, desired_perf);
> -}
> -
> -static void cppc_check_hisi_workaround(void)
> -{
> -	struct acpi_table_header *tbl;
> -	acpi_status status = AE_OK;
> -	int i;
> -
> -	status = acpi_get_table(ACPI_SIG_PCCT, 0, &tbl);
> -	if (ACPI_FAILURE(status) || !tbl)
> -		return;
> -
> -	for (i = 0; i < ARRAY_SIZE(wa_info); i++) {
> -		if (!memcmp(wa_info[i].oem_id, tbl->oem_id, ACPI_OEM_ID_SIZE) &&
> -		    !memcmp(wa_info[i].oem_table_id, tbl->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) &&
> -		    wa_info[i].oem_revision == tbl->oem_revision) {
> -			/* Overwrite the get() callback */
> -			cppc_cpufreq_driver.get = hisi_cppc_cpufreq_get_rate;
> -			fie_disabled = FIE_DISABLED;
> -			break;
> -		}
> -	}
> -
> -	acpi_put_table(tbl);
> -}
> -
>   static int __init cppc_cpufreq_init(void)
>   {
>   	int ret;
> @@ -899,7 +829,6 @@ static int __init cppc_cpufreq_init(void)
>   	if (!acpi_cpc_valid())
>   		return -ENODEV;
>   
> -	cppc_check_hisi_workaround();
>   	cppc_freq_invariance_init();
>   	populate_efficiency_class();
>   

  parent reply	other threads:[~2024-09-25  9:36 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-19  8:45 [PATCH v3 0/2] cppc_cpufreq: Rework ->get() error handling when cores are idle Jie Zhan
2024-09-19  8:45 ` [PATCH v3 1/2] cppc_cpufreq: Use desired perf if feedback ctrs are 0 or unchanged Jie Zhan
2024-09-25  9:28   ` lihuisong (C)
2024-09-26  2:57     ` Jie Zhan
2024-09-26  6:07       ` lihuisong (C)
2024-09-26  8:44         ` Jie Zhan
2024-09-26 10:08           ` lihuisong (C)
2024-09-19  8:45 ` [PATCH v3 2/2] cppc_cpufreq: Remove HiSilicon CPPC workaround Jie Zhan
2024-09-25  6:30   ` Xiongfeng Wang
2024-09-26  2:59     ` Jie Zhan
2024-09-25  9:36   ` lihuisong (C) [this message]
2024-09-26  2:59     ` Jie Zhan

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