From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AFA382F39A4; Thu, 14 Aug 2025 11:14:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755170046; cv=none; b=uGwThPIqLKgSFPFmj6rDR/dGPJBXmyhRFbVp4mdIhfR8SoM19MOwQ49raM3IW92T77PzD+TNkV3RidO6jcTWzIdALPcFyJHHS9YESkiBlo/2OMSTKEXLnk00kFkkThdL7K5bM7yFSmj5/rdEKG9p5RHDEyyQlI3pMki+DyipLiA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755170046; c=relaxed/simple; bh=Zp1LwTzGyu5opfZZQrk1YaVyVYP61aThHFWSJdfT0J0=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=ZSWmI7vhhiG/z3byqHAWzJMjuqR8uNHZ1sraeimaM9UBQMLReQJ9X8xN6zoFMl2cSS5VRgB4mOetnsFwMdEbL5WuJ5u4XzFujkz0zZUysPRrW7vAb0OZqiwivVEwMQ78S3r+aJYeRhg5UEv7cKXZTXOI9LW9A/wOJXF7iadOIGE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=t1NNCoDS; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="t1NNCoDS" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 39150C4CEEF; Thu, 14 Aug 2025 11:14:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1755170046; bh=Zp1LwTzGyu5opfZZQrk1YaVyVYP61aThHFWSJdfT0J0=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=t1NNCoDSYRuWtD7PfLDno+SNNPsMDobPhxKPDCWbIbMWnrFJQriYfQFKY6zOpEMoQ ///hIoz8SEul3HnFinP+t93BiMm63HUrtQuSNoU6KhDt+4FPQ6StaXyMlTfmSxDhNh QYLXFoCmo+/p1XFAIv9t+5dAmyZCHdkOqYS/BpAA4nJj2X4zXkEAyaErLVOqxPiiB5 vSNrI489fs994s//ajfkcFCY9E9yXjp0yM6dKOCGtVnkoeF5tLHY1TyAefInQH4s1u 4v/17xiX1gX+kNDiejPRYKXbvs8sG93PPdFhhHK6qYChnyZ5RD9ksy1ZskU6KLZyGp RlyZzHjJBxSLA== Received: from sofa.misterjones.org ([185.219.108.64] helo=lobster-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1umVuG-007Q0C-4x; Thu, 14 Aug 2025 12:14:04 +0100 Date: Thu, 14 Aug 2025 12:14:03 +0100 Message-ID: <871ppetatg.wl-maz@kernel.org> From: Marc Zyngier To: Daniel Lezcano , Steven Price Cc: linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , "Rafael J. Wysocki" , Thomas Gleixner , Mark Rutland Subject: Re: [PATCH 2/4] clocksource/drivers/arm_arch_timer: Add standalone MMIO driver In-Reply-To: <86ldnmdvpl.wl-maz@kernel.org> References: <20250807160243.1970533-1-maz@kernel.org> <20250807160243.1970533-3-maz@kernel.org> <8e58b01b-772d-4ca7-a681-34f10baa07e6@arm.com> <86ldnmdvpl.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: daniel.lezcano@linaro.org, steven.price@arm.com, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@arm.com, rafael@kernel.org, tglx@linutronix.de, mark.rutland@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 14 Aug 2025 11:49:26 +0100, Marc Zyngier wrote: > > On Thu, 14 Aug 2025 11:13:47 +0100, > Steven Price wrote: > > > > On 07/08/2025 17:02, Marc Zyngier wrote: > > > Add a new driver for the MMIO side of the ARM architected timer. > > > Most of it has been lifted from the existing arch timer code, > > > massaged, and finally rewritten. > > > > > > It supports both DT and ACPI as firmware descriptions. > > > > > > Signed-off-by: Marc Zyngier > > > --- > > > MAINTAINERS | 1 + > > > drivers/clocksource/arm_arch_timer_mmio.c | 420 ++++++++++++++++++++++ > > > 2 files changed, 421 insertions(+) > > > create mode 100644 drivers/clocksource/arm_arch_timer_mmio.c > > > > > [...] > > > +static void arch_timer_mmio_setup(struct arch_timer *at, int irq) > > > +{ > > > + at->evt = (struct clock_event_device) { > > > + .features = (CLOCK_EVT_FEAT_ONESHOT | > > > + CLOCK_EVT_FEAT_DYNIRQ), > > > + .name = "arch_mem_timer", > > > + .rating = 400, > > > + .cpumask = cpu_possible_mask, > > > + .irq = irq, > > > + .set_next_event = arch_timer_mmio_set_next_event, > > > + .set_state_oneshot_stopped = arch_timer_mmio_shutdown, > > > + .set_state_shutdown = arch_timer_mmio_shutdown, > > > + }; > > > + > > > + at->evt.set_state_shutdown(&at->evt); > > > + > > > + clockevents_config_and_register(&at->evt, at->rate, 0xf, CLOCKSOURCE_MASK(56)); > > > > This doesn't work on 32 bit - clockevents_config_and_register()'s final > > argument is an unsigned long, and a 56 bit mask doesn't fit. This > > triggers a compiler warning: > > Already reported, see 20250814111657.7debc9f1@canb.auug.org.au. > > > Possible this should really be min(CLOCKSOURCE_MASK(56), ULONG_MAX)? But > > I'm not familiar enough with this code. Most likely it's dead code on a > > 32 bit platform. > > No, this definitely exists on 32bit crap, since it has been part of > the architecture from the ARMv7+VE days. > > I think this is more of an impedance mismatch between the > CLOCKSOURCE_MASK() helper and the clockevents_config_and_register(), > and a (unsigned long) cast would do the trick. Of course not. That would just result in a big fat zero. > But it also means that the per-cpu timer also gets truncated the same > way, and that has interesting impacts on how often the timer is > reprogrammed. That question still stand, and I wonder whether we have ugly bugs lurking on 32bit platforms because of that... I'll try and have a look. M. -- Jazz isn't dead. It just smells funny.