From: "Compostella, Jeremy" <jeremy.compostella@intel.com>
To: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: <linux-acpi@vger.kernel.org>
Subject: Re: ACPI: EC: Clear GPE on interrupt handling only
Date: Mon, 05 Jun 2023 15:26:59 -0700 [thread overview]
Message-ID: <87ilc1lf4c.fsf@jcompost-mobl.amr.corp.intel.com> (raw)
In-Reply-To: <CAJZ5v0jina9b4Yt9prEwbemyiGY2Q4psRawkwLZ+VKYY90R2xA@mail.gmail.com> (Rafael J. Wysocki's message of "Mon, 5 Jun 2023 18:26:45 +0200")
[-- Attachment #1: Type: text/plain, Size: 1752 bytes --]
"Rafael J. Wysocki" <rafael@kernel.org> writes:
> On Mon, Jun 5, 2023 at 6:14 PM Rafael J. Wysocki <rafael@kernel.org> wrote:
>>
>> On Tue, May 16, 2023 at 2:02 AM Compostella, Jeremy
>> <jeremy.compostella@intel.com> wrote:
>> >
>> > On multiple devices I work on, we noticed that
>> > /sys/firmware/acpi/interrupts/sci_not is non-zero and keeps increasing
>> > over time.
>> >
>> > It turns out that there is a race condition between servicing a GPE
>> > interrupt and handling task driven transactions.
>> >
>> > If a GPE interrupt is received at the same time ec_poll() is running,
>> > the advance_transaction() clears the GPE flag and the interrupt is not
>> > serviced as acpi_ev_detect_gpe() relies on the GPE flag to call the
>> > handler. As a result, `sci_not' is increased.
>>
>> And if I'm not mistaken, it is not necessary to run the entire
>> interrupt handler in that case, because the currently running
>> advance_transaction() will take care of the pending event anyway.
>>
>> I agree that it is confusing to increase sci_not in that case, but I'm
>> not sure if running the entire advance_transaction() for the same
>> transaction twice in a row, once from ec_poll() and once from the
>> interrupt handler is entirely correct.
>
> However, if the interrupt handler wins the race, advance_transaction()
> will run for the same transaction twice in a row anyway, so this
> change will only make it happen more often.
>
> So no objections, but I would move the GPE clearing piece directly
> into acpi_ec_handle_interrupt(), because it will only be needed there
> and it doesn't depend on anything else in advance_transaction().
I took into account your suggestion (cf. patch in attachment).
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0001-ACPI-EC-Clear-GPE-on-interrupt-handling-only.patch --]
[-- Type: text/x-patch, Size: 2547 bytes --]
From 42fa736fcd5d6a2e17c550f493a12e8df2e7cd72 Mon Sep 17 00:00:00 2001
From: Jeremy Compostella <jeremy.compostella@intel.com>
Date: Mon, 15 May 2023 16:49:19 -0700
Subject: [PATCH] ACPI: EC: Clear GPE on interrupt handling only
On multiple devices I work on, we noticed that
/sys/firmware/acpi/interrupts/sci_not is non-zero and keeps increasing
over time.
It turns out that there is a race condition between servicing a GPE
interrupt and handling task driven transactions.
If a GPE interrupt is received at the same time ec_poll() is running,
the advance_transaction() clears the GPE flag and the interrupt is not
serviced as acpi_ev_detect_gpe() relies on the GPE flag to call the
handler. As a result, `sci_not' is increased.
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
---
drivers/acpi/ec.c | 31 ++++++++++++++++---------------
1 file changed, 16 insertions(+), 15 deletions(-)
diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
index 928899ab9502..8569f55e55b6 100644
--- a/drivers/acpi/ec.c
+++ b/drivers/acpi/ec.c
@@ -662,21 +662,6 @@ static void advance_transaction(struct acpi_ec *ec, bool interrupt)
ec_dbg_stm("%s (%d)", interrupt ? "IRQ" : "TASK", smp_processor_id());
- /*
- * Clear GPE_STS upfront to allow subsequent hardware GPE_STS 0->1
- * changes to always trigger a GPE interrupt.
- *
- * GPE STS is a W1C register, which means:
- *
- * 1. Software can clear it without worrying about clearing the other
- * GPEs' STS bits when the hardware sets them in parallel.
- *
- * 2. As long as software can ensure only clearing it when it is set,
- * hardware won't set it in parallel.
- */
- if (ec->gpe >= 0 && acpi_ec_gpe_status_set(ec))
- acpi_clear_gpe(NULL, ec->gpe);
-
status = acpi_ec_read_status(ec);
/*
@@ -1287,6 +1272,22 @@ static void acpi_ec_handle_interrupt(struct acpi_ec *ec)
unsigned long flags;
spin_lock_irqsave(&ec->lock, flags);
+
+ /*
+ * Clear GPE_STS upfront to allow subsequent hardware GPE_STS 0->1
+ * changes to always trigger a GPE interrupt.
+ *
+ * GPE STS is a W1C register, which means:
+ *
+ * 1. Software can clear it without worrying about clearing the other
+ * GPEs' STS bits when the hardware sets them in parallel.
+ *
+ * 2. As long as software can ensure only clearing it when it is set,
+ * hardware won't set it in parallel.
+ */
+ if (ec->gpe >= 0 && acpi_ec_gpe_status_set(ec))
+ acpi_clear_gpe(NULL, ec->gpe);
+
advance_transaction(ec, true);
spin_unlock_irqrestore(&ec->lock, flags);
}
--
2.40.1
[-- Attachment #3: Type: text/plain, Size: 821 bytes --]
>> > Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
>> > ---
>> > drivers/acpi/ec.c | 2 +-
>> > 1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
>> > index 928899ab9502..42af09732238 100644
>> > --- a/drivers/acpi/ec.c
>> > +++ b/drivers/acpi/ec.c
>> > @@ -674,7 +674,7 @@ static void advance_transaction(struct acpi_ec *ec, bool interrupt)
>> > * 2. As long as software can ensure only clearing it when it is set,
>> > * hardware won't set it in parallel.
>> > */
>> > - if (ec->gpe >= 0 && acpi_ec_gpe_status_set(ec))
>> > + if (interrupt && ec->gpe >= 0 && acpi_ec_gpe_status_set(ec))
>> > acpi_clear_gpe(NULL, ec->gpe);
>> >
>> > status = acpi_ec_read_status(ec);
>> > --
next prev parent reply other threads:[~2023-06-05 22:27 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-16 0:02 ACPI: EC: Clear GPE on interrupt handling only Compostella, Jeremy
2023-06-05 16:14 ` Rafael J. Wysocki
2023-06-05 16:26 ` Rafael J. Wysocki
2023-06-05 22:26 ` Compostella, Jeremy [this message]
2023-06-06 14:24 ` Rafael J. Wysocki
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87ilc1lf4c.fsf@jcompost-mobl.amr.corp.intel.com \
--to=jeremy.compostella@intel.com \
--cc=linux-acpi@vger.kernel.org \
--cc=rafael@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox