From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33E32C433FE for ; Sun, 9 Oct 2022 01:09:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229777AbiJIBJu (ORCPT ); Sat, 8 Oct 2022 21:09:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35232 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229772AbiJIBJt (ORCPT ); Sat, 8 Oct 2022 21:09:49 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A922417897; Sat, 8 Oct 2022 18:09:46 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 65DDC60A39; Sun, 9 Oct 2022 01:09:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B545EC433D6; Sun, 9 Oct 2022 01:09:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665277784; bh=E9QLgyhF+lPn4P5xm5K5n9w5uHxiziXWKS7iOyG0cW4=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=hwAmqKIfojx4wr26MeIMDWqVB0ar+6+frmSVNpty9vQR+Bn8OIjO5AzrqbhC/FcPK iCYRonHuTBfJyULP1a/makgBv2be7XqNcblAV5V/N9CP+zi9Qw1ZogTXlNndJnCFrD zTQq8mrhfeBwi1edNZk9aKpaaNbAxxA7mQ2Jkn4BKNoTx/TQg0jInaSqP3XCuha2M8 3EDLUIAzy/p9iU1UHsYrCshQ/yj4wU3kIQR1RNWgJcweaidFbB2rFhAcPpwcLaSSez YrhCBPbpWQ9EdYGdGNMeFaEfuQcT23HzBrXL1lW7ddqqguN6gPogvWW51GWauf2evr nMPiCRlcI8M3w== Received: from [156.39.10.100] (helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1ohKp4-00FKmf-BG; Sun, 09 Oct 2022 02:09:42 +0100 Date: Sun, 09 Oct 2022 02:08:44 +0100 Message-ID: <87v8othkgz.wl-maz@kernel.org> From: Marc Zyngier To: Jianmin Lv Cc: Thomas Gleixner , linux-kernel@vger.kernel.org, loongarch@lists.linux.dev, Jiaxun Yang , Huacai Chen , Bjorn Helgaas , Len Brown , rafael@kernel.org, linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org Subject: Re: [PATCH V2 1/2] irqchip/loongson-pch-pic: Support to set irq type for ACPI path In-Reply-To: <20221008025150.10734-2-lvjianmin@loongson.cn> References: <20221008025150.10734-1-lvjianmin@loongson.cn> <20221008025150.10734-2-lvjianmin@loongson.cn> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 156.39.10.100 X-SA-Exim-Rcpt-To: lvjianmin@loongson.cn, tglx@linutronix.de, linux-kernel@vger.kernel.org, loongarch@lists.linux.dev, jiaxun.yang@flygoat.com, chenhuacai@loongson.cn, bhelgaas@google.com, lenb@kernel.org, rafael@kernel.org, linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org On Sat, 08 Oct 2022 03:51:49 +0100, Jianmin Lv wrote: > > For ACPI path, the translate callback used IRQ_TYPE_NONE and ignored > the irq type in fwspec->param[1]. For supporting to set type for > irqs of the irqdomain, fwspec->param[1] should be used to get irq > type. > > On Loongson platform, the irq trigger type of PCI devices is > high level, so high level triggered type is inputed to acpi_register_gsi > when create irq mapping for PCI devices. > > Signed-off-by: Jianmin Lv > --- > drivers/acpi/pci_irq.c | 6 ++++-- > drivers/irqchip/irq-loongson-pch-pic.c | 9 ++++++++- > 2 files changed, 12 insertions(+), 3 deletions(-) > > diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c > index 08e15774fb9f..ff30ceca2203 100644 > --- a/drivers/acpi/pci_irq.c > +++ b/drivers/acpi/pci_irq.c > @@ -387,13 +387,15 @@ int acpi_pci_irq_enable(struct pci_dev *dev) > u8 pin; > int triggering = ACPI_LEVEL_SENSITIVE; > /* > - * On ARM systems with the GIC interrupt model, level interrupts > + * On ARM systems with the GIC interrupt model, or LoongArch > + * systems with the LPIC interrupt model, level interrupts > * are always polarity high by specification; PCI legacy > * IRQs lines are inverted before reaching the interrupt > * controller and must therefore be considered active high > * as default. > */ > - int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ? > + int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC || > + acpi_irq_model == ACPI_IRQ_MODEL_LPIC ? > ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW; > char *link = NULL; > char link_desc[16]; This is one patch adding support for the LPIC model. > diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c > index c01b9c257005..5576c97fec85 100644 > --- a/drivers/irqchip/irq-loongson-pch-pic.c > +++ b/drivers/irqchip/irq-loongson-pch-pic.c > @@ -159,11 +159,18 @@ static int pch_pic_domain_translate(struct irq_domain *d, > return -EINVAL; > > if (of_node) { > + if (fwspec->param_count < 2) > + return -EINVAL; > + This is another patch fixing a regression introduced by bcdd75c596c8. > *hwirq = fwspec->param[0] + priv->ht_vec_base; > *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK; > } else { > *hwirq = fwspec->param[0] - priv->gsi_base; > - *type = IRQ_TYPE_NONE; > + > + if (fwspec->param_count > 1) > + *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK; > + else > + *type = IRQ_TYPE_NONE; This is yet another patch fixing PCI INTx handling. You can also move the check against 'param_count < 1' in this block. > } > > return 0; M. -- Without deviation from the norm, progress is not possible.